hotspot/src/cpu/x86/vm/x86_32.ad
changeset 46440 61025eecb743
parent 41673 e8b3ccb2cfcf
child 46620 750c6edff33b
--- a/hotspot/src/cpu/x86/vm/x86_32.ad	Sat May 06 00:05:32 2017 +0000
+++ b/hotspot/src/cpu/x86/vm/x86_32.ad	Fri May 05 19:28:54 2017 -0700
@@ -290,7 +290,7 @@
   if (C->in_24_bit_fp_mode()) {
     size += 6; // fldcw
   }
-  if (C->max_vector_size() > 16) {
+  if (VM_Version::supports_vzeroupper()) {
     size += 3; // vzeroupper
   }
   return size;
@@ -1884,7 +1884,6 @@
     }
   %}
 
-
   enc_class pre_call_resets %{
     // If method sets FPU control word restore it here
     debug_only(int off0 = cbuf.insts_size());
@@ -1892,12 +1891,10 @@
       MacroAssembler _masm(&cbuf);
       __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
     }
-    if (ra_->C->max_vector_size() > 16) {
-      // Clear upper bits of YMM registers when current compiled code uses
-      // wide vectors to avoid AVX <-> SSE transition penalty during call.
-      MacroAssembler _masm(&cbuf);
-      __ vzeroupper();
-    }
+    // Clear upper bits of YMM registers when current compiled code uses
+    // wide vectors to avoid AVX <-> SSE transition penalty during call.
+    MacroAssembler _masm(&cbuf);
+    __ vzeroupper();
     debug_only(int off1 = cbuf.insts_size());
     assert(off1 - off0 == pre_call_resets_size(), "correct size prediction");
   %}
@@ -13072,7 +13069,7 @@
   ins_cost(300);
   format %{ "CALL_LEAF_NOFP,runtime " %}
   opcode(0xE8); /* E8 cd */
-  ins_encode(Java_To_Runtime(meth));
+  ins_encode(pre_call_resets, Java_To_Runtime(meth));
   ins_pipe( pipe_slow );
 %}