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hotspot/src/os_cpu/linux_x86/vm/os_linux_x86.cpp
changeset 6176 4d9030fe341f
parent 5547 f4b087cbb361
child 7108 4f87b92f3060 
--- a/hotspot/src/os_cpu/linux_x86/vm/os_linux_x86.cpp	Wed Jul 28 17:57:43 2010 -0400
+++ b/hotspot/src/os_cpu/linux_x86/vm/os_linux_x86.cpp	Tue Aug 03 08:13:38 2010 -0400
@@ -718,6 +718,11 @@
 
   ucontext_t *uc = (ucontext_t*)context;
   st->print_cr("Registers:");
+
+  // this is horrendously verbose but the layout of the registers in the
+  // context does not match how we defined our abstract Register set, so
+  // we can't just iterate through the gregs area
+
 #ifdef AMD64
   st->print(  "RAX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RAX]);
   st->print(", RBX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RBX]);
@@ -745,6 +750,63 @@
   st->print(", ERR=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_ERR]);
   st->cr();
   st->print("  TRAPNO=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_TRAPNO]);
+
+  st->cr();
+  st->cr();
+
+  st->print_cr("Register to memory mapping:");
+  st->cr();
+
+  // this is only for the "general purpose" registers
+
+  st->print_cr("RAX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RAX]);
+  print_location(st, uc->uc_mcontext.gregs[REG_RAX]);
+  st->cr();
+  st->print_cr("RBX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RBX]);
+  print_location(st, uc->uc_mcontext.gregs[REG_RBX]);
+  st->cr();
+  st->print_cr("RCX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RCX]);
+  print_location(st, uc->uc_mcontext.gregs[REG_RCX]);
+  st->cr();
+  st->print_cr("RDX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RDX]);
+  print_location(st, uc->uc_mcontext.gregs[REG_RDX]);
+  st->cr();
+  st->print_cr("RSP=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RSP]);
+  print_location(st, uc->uc_mcontext.gregs[REG_RSP]);
+  st->cr();
+  st->print_cr("RBP=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RBP]);
+  print_location(st, uc->uc_mcontext.gregs[REG_RBP]);
+  st->cr();
+  st->print_cr("RSI=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RSI]);
+  print_location(st, uc->uc_mcontext.gregs[REG_RSI]);
+  st->cr();
+  st->print_cr("RDI=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_RDI]);
+  print_location(st, uc->uc_mcontext.gregs[REG_RDI]);
+  st->cr();
+  st->print_cr("R8 =" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R8]);
+  print_location(st, uc->uc_mcontext.gregs[REG_R8]);
+  st->cr();
+  st->print_cr("R9 =" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R9]);
+  print_location(st, uc->uc_mcontext.gregs[REG_R9]);
+  st->cr();
+  st->print_cr("R10=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R10]);
+  print_location(st, uc->uc_mcontext.gregs[REG_R10]);
+  st->cr();
+  st->print_cr("R11=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R11]);
+  print_location(st, uc->uc_mcontext.gregs[REG_R11]);
+  st->cr();
+  st->print_cr("R12=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R12]);
+  print_location(st, uc->uc_mcontext.gregs[REG_R12]);
+  st->cr();
+  st->print_cr("R13=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R13]);
+  print_location(st, uc->uc_mcontext.gregs[REG_R13]);
+  st->cr();
+  st->print_cr("R14=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R14]);
+  print_location(st, uc->uc_mcontext.gregs[REG_R14]);
+  st->cr();
+  st->print_cr("R15=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_R15]);
+  print_location(st, uc->uc_mcontext.gregs[REG_R15]);
+
 #else
   st->print(  "EAX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_EAX]);
   st->print(", EBX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_EBX]);
@@ -759,6 +821,39 @@
   st->print(  "EIP=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_EIP]);
   st->print(", CR2=" INTPTR_FORMAT, uc->uc_mcontext.cr2);
   st->print(", EFLAGS=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_EFL]);
+
+  st->cr();
+  st->cr();
+
+  st->print_cr("Register to memory mapping:");
+  st->cr();
+
+  // this is only for the "general purpose" registers
+
+  st->print_cr("EAX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_EAX]);
+  print_location(st, uc->uc_mcontext.gregs[REG_EAX]);
+  st->cr();
+  st->print_cr("EBX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_EBX]);
+  print_location(st, uc->uc_mcontext.gregs[REG_EBX]);
+  st->cr();
+  st->print_cr("ECX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_ECX]);
+  print_location(st, uc->uc_mcontext.gregs[REG_ECX]);
+  st->cr();
+  st->print_cr("EDX=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_EDX]);
+  print_location(st, uc->uc_mcontext.gregs[REG_EDX]);
+  st->cr();
+  st->print_cr("ESP=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_ESP]);
+  print_location(st, uc->uc_mcontext.gregs[REG_ESP]);
+  st->cr();
+  st->print_cr("EBP=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_EBP]);
+  print_location(st, uc->uc_mcontext.gregs[REG_EBP]);
+  st->cr();
+  st->print_cr("ESI=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_ESI]);
+  print_location(st, uc->uc_mcontext.gregs[REG_ESI]);
+  st->cr();
+  st->print_cr("EDI=" INTPTR_FORMAT, uc->uc_mcontext.gregs[REG_EDI]);
+  print_location(st, uc->uc_mcontext.gregs[REG_EDI]);
+
 #endif // AMD64
   st->cr();
   st->cr();
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