--- a/hotspot/src/cpu/ppc/vm/ppc.ad	Mon May 09 01:21:55 2016 -0700
+++ b/hotspot/src/cpu/ppc/vm/ppc.ad	Mon May 09 11:34:09 2016 +0200
@@ -817,6 +817,16 @@
 
 source %{
 
+// Should the Matcher clone shifts on addressing modes, expecting them
+// to be subsumed into complex addressing expressions or compute them
+// into registers?
+bool Matcher::clone_address_expressions(AddPNode* m, Matcher::MStack& mstack, VectorSet& address_visited) {
+  return clone_base_plus_offset_address(m, mstack, address_visited);
+}
+
+void Compile::reshape_address(AddPNode* addp) {
+}
+
 // Optimize load-acquire.
 //
 // Check if acquire is unnecessary due to following operation that does
@@ -2157,11 +2167,6 @@
 // Power6 requires postalloc expand (see block.cpp for description of postalloc expand).
 const bool Matcher::require_postalloc_expand = true;
 
-// Should the Matcher clone shifts on addressing modes, expecting them to
-// be subsumed into complex addressing expressions or compute them into
-// registers? True for Intel but false for most RISCs.
-const bool Matcher::clone_shift_expressions = false;
-
 // Do we need to mask the count passed to shift instructions or does
 // the cpu only look at the lower 5/6 bits anyway?
 // PowerPC requires masked shift counts.