src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.core.common/src/org/graalvm/compiler/core/common/spi/ForeignCallLinkage.java
--- a/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.core.common/src/org/graalvm/compiler/core/common/spi/ForeignCallLinkage.java Thu Nov 14 11:16:14 2019 -0800
+++ b/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.core.common/src/org/graalvm/compiler/core/common/spi/ForeignCallLinkage.java Thu Nov 14 12:21:00 2019 -0800
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2009, 2018, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2009, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@@ -73,4 +73,13 @@
* the VM to be able to inspect the thread's execution state.
*/
boolean needsDebugInfo();
+
+ /**
+ * Returns true if further cleanup on the float registers is needed after performing the foreign
+ * call. This is critical on AMD64 as there is a performance penalty switching between legacy
+ * SSE and AVX instruction while the upper halves of the xmm registers are not zero.
+ */
+ default boolean needsClearUpperVectorRegisters() {
+ return false;
+ }
}