53 Register thread, |
53 Register thread, |
54 Register tmp, |
54 Register tmp, |
55 bool tosca_live, |
55 bool tosca_live, |
56 bool expand_call); |
56 bool expand_call); |
57 |
57 |
58 void load_reference_barrier_not_null(MacroAssembler* masm, Register dst); |
58 void load_reference_barrier_not_null(MacroAssembler* masm, Register dst, Address src); |
59 |
59 |
60 void storeval_barrier_impl(MacroAssembler* masm, Register dst, Register tmp); |
60 void storeval_barrier_impl(MacroAssembler* masm, Register dst, Register tmp); |
61 |
61 |
62 address generate_shenandoah_lrb(StubCodeGenerator* cgen); |
62 address generate_shenandoah_lrb(StubCodeGenerator* cgen); |
63 |
63 |
70 void gen_load_reference_barrier_stub(LIR_Assembler* ce, ShenandoahLoadReferenceBarrierStub* stub); |
70 void gen_load_reference_barrier_stub(LIR_Assembler* ce, ShenandoahLoadReferenceBarrierStub* stub); |
71 void generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm); |
71 void generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm); |
72 void generate_c1_load_reference_barrier_runtime_stub(StubAssembler* sasm); |
72 void generate_c1_load_reference_barrier_runtime_stub(StubAssembler* sasm); |
73 #endif |
73 #endif |
74 |
74 |
75 void load_reference_barrier(MacroAssembler* masm, Register dst); |
75 void load_reference_barrier(MacroAssembler* masm, Register dst, Address src); |
76 void load_reference_barrier_native(MacroAssembler* masm, Register dst, Address src); |
76 void load_reference_barrier_native(MacroAssembler* masm, Register dst, Address src); |
77 |
77 |
78 void cmpxchg_oop(MacroAssembler* masm, |
78 void cmpxchg_oop(MacroAssembler* masm, |
79 Register res, Address addr, Register oldval, Register newval, |
79 Register res, Address addr, Register oldval, Register newval, |
80 bool exchange, Register tmp1, Register tmp2); |
80 bool exchange, Register tmp1, Register tmp2); |