43 rxmm4 x4, rxmm5 x5, rxmm6 x6, rxmm7 x7, |
49 rxmm4 x4, rxmm5 x5, rxmm6 x6, rxmm7 x7, |
44 rxmm8 x8, rxmm9 x9, rxmm10 x10, rxmm11 x11, |
50 rxmm8 x8, rxmm9 x9, rxmm10 x10, rxmm11 x11, |
45 rxmm12 x12, rxmm13 x13, rxmm14 x14, rxmm15 x15) %{ |
51 rxmm12 x12, rxmm13 x13, rxmm14 x14, rxmm15 x15) %{ |
46 |
52 |
47 match(Set dst (LoadBarrierSlowReg src)); |
53 match(Set dst (LoadBarrierSlowReg src)); |
48 predicate(UseAVX <= 2); |
54 predicate((UseAVX <= 2) && !n->as_LoadBarrierSlowReg()->is_weak()); |
49 |
55 |
50 effect(DEF dst, KILL cr, |
56 effect(DEF dst, KILL cr, |
51 KILL x0, KILL x1, KILL x2, KILL x3, |
57 KILL x0, KILL x1, KILL x2, KILL x3, |
52 KILL x4, KILL x5, KILL x6, KILL x7, |
58 KILL x4, KILL x5, KILL x6, KILL x7, |
53 KILL x8, KILL x9, KILL x10, KILL x11, |
59 KILL x8, KILL x9, KILL x10, KILL x11, |
72 rxmm20 x20, rxmm21 x21, rxmm22 x22, rxmm23 x23, |
78 rxmm20 x20, rxmm21 x21, rxmm22 x22, rxmm23 x23, |
73 rxmm24 x24, rxmm25 x25, rxmm26 x26, rxmm27 x27, |
79 rxmm24 x24, rxmm25 x25, rxmm26 x26, rxmm27 x27, |
74 rxmm28 x28, rxmm29 x29, rxmm30 x30, rxmm31 x31) %{ |
80 rxmm28 x28, rxmm29 x29, rxmm30 x30, rxmm31 x31) %{ |
75 |
81 |
76 match(Set dst (LoadBarrierSlowReg src)); |
82 match(Set dst (LoadBarrierSlowReg src)); |
77 predicate(UseAVX == 3); |
83 predicate((UseAVX == 3) && !n->as_LoadBarrierSlowReg()->is_weak()); |
78 |
84 |
79 effect(DEF dst, KILL cr, |
85 effect(DEF dst, KILL cr, |
80 KILL x0, KILL x1, KILL x2, KILL x3, |
86 KILL x0, KILL x1, KILL x2, KILL x3, |
81 KILL x4, KILL x5, KILL x6, KILL x7, |
87 KILL x4, KILL x5, KILL x6, KILL x7, |
82 KILL x8, KILL x9, KILL x10, KILL x11, |
88 KILL x8, KILL x9, KILL x10, KILL x11, |
100 rxmm0 x0, rxmm1 x1, rxmm2 x2,rxmm3 x3, |
106 rxmm0 x0, rxmm1 x1, rxmm2 x2,rxmm3 x3, |
101 rxmm4 x4, rxmm5 x5, rxmm6 x6, rxmm7 x7, |
107 rxmm4 x4, rxmm5 x5, rxmm6 x6, rxmm7 x7, |
102 rxmm8 x8, rxmm9 x9, rxmm10 x10, rxmm11 x11, |
108 rxmm8 x8, rxmm9 x9, rxmm10 x10, rxmm11 x11, |
103 rxmm12 x12, rxmm13 x13, rxmm14 x14, rxmm15 x15) %{ |
109 rxmm12 x12, rxmm13 x13, rxmm14 x14, rxmm15 x15) %{ |
104 |
110 |
105 match(Set dst (LoadBarrierWeakSlowReg src)); |
111 match(Set dst (LoadBarrierSlowReg src)); |
106 predicate(UseAVX <= 2); |
112 predicate((UseAVX <= 2) && n->as_LoadBarrierSlowReg()->is_weak()); |
107 |
113 |
108 effect(DEF dst, KILL cr, |
114 effect(DEF dst, KILL cr, |
109 KILL x0, KILL x1, KILL x2, KILL x3, |
115 KILL x0, KILL x1, KILL x2, KILL x3, |
110 KILL x4, KILL x5, KILL x6, KILL x7, |
116 KILL x4, KILL x5, KILL x6, KILL x7, |
111 KILL x8, KILL x9, KILL x10, KILL x11, |
117 KILL x8, KILL x9, KILL x10, KILL x11, |
129 rxmm16 x16, rxmm17 x17, rxmm18 x18, rxmm19 x19, |
135 rxmm16 x16, rxmm17 x17, rxmm18 x18, rxmm19 x19, |
130 rxmm20 x20, rxmm21 x21, rxmm22 x22, rxmm23 x23, |
136 rxmm20 x20, rxmm21 x21, rxmm22 x22, rxmm23 x23, |
131 rxmm24 x24, rxmm25 x25, rxmm26 x26, rxmm27 x27, |
137 rxmm24 x24, rxmm25 x25, rxmm26 x26, rxmm27 x27, |
132 rxmm28 x28, rxmm29 x29, rxmm30 x30, rxmm31 x31) %{ |
138 rxmm28 x28, rxmm29 x29, rxmm30 x30, rxmm31 x31) %{ |
133 |
139 |
134 match(Set dst (LoadBarrierWeakSlowReg src)); |
140 match(Set dst (LoadBarrierSlowReg src)); |
135 predicate(UseAVX == 3); |
141 predicate((UseAVX == 3) && n->as_LoadBarrierSlowReg()->is_weak()); |
136 |
142 |
137 effect(DEF dst, KILL cr, |
143 effect(DEF dst, KILL cr, |
138 KILL x0, KILL x1, KILL x2, KILL x3, |
144 KILL x0, KILL x1, KILL x2, KILL x3, |
139 KILL x4, KILL x5, KILL x6, KILL x7, |
145 KILL x4, KILL x5, KILL x6, KILL x7, |
140 KILL x8, KILL x9, KILL x10, KILL x11, |
146 KILL x8, KILL x9, KILL x10, KILL x11, |
150 z_load_barrier_slow_reg(_masm, $dst$$Register, $src$$Address, true /* weak */); |
156 z_load_barrier_slow_reg(_masm, $dst$$Register, $src$$Address, true /* weak */); |
151 %} |
157 %} |
152 |
158 |
153 ins_pipe(pipe_slow); |
159 ins_pipe(pipe_slow); |
154 %} |
160 %} |
|
161 |
|
162 // Specialized versions of compareAndExchangeP that adds a keepalive that is consumed |
|
163 // but doesn't affect output. |
|
164 |
|
165 instruct z_compareAndExchangeP( |
|
166 memory mem_ptr, |
|
167 rax_RegP oldval, rRegP newval, rRegP keepalive, |
|
168 rFlagsReg cr) %{ |
|
169 predicate(VM_Version::supports_cx8()); |
|
170 match(Set oldval (ZCompareAndExchangeP (Binary mem_ptr keepalive) (Binary oldval newval))); |
|
171 effect(KILL cr); |
|
172 |
|
173 format %{ "cmpxchgq $mem_ptr,$newval\t# " |
|
174 "If rax == $mem_ptr then store $newval into $mem_ptr\n\t" %} |
|
175 opcode(0x0F, 0xB1); |
|
176 ins_encode(lock_prefix, |
|
177 REX_reg_mem_wide(newval, mem_ptr), |
|
178 OpcP, OpcS, |
|
179 reg_mem(newval, mem_ptr) // lock cmpxchg |
|
180 ); |
|
181 ins_pipe( pipe_cmpxchg ); |
|
182 %} |
|
183 |
|
184 instruct z_compareAndSwapP(rRegI res, |
|
185 memory mem_ptr, |
|
186 rax_RegP oldval, rRegP newval, rRegP keepalive, |
|
187 rFlagsReg cr) %{ |
|
188 predicate(VM_Version::supports_cx8()); |
|
189 match(Set res (ZCompareAndSwapP (Binary mem_ptr keepalive) (Binary oldval newval))); |
|
190 match(Set res (ZWeakCompareAndSwapP (Binary mem_ptr keepalive) (Binary oldval newval))); |
|
191 effect(KILL cr, KILL oldval); |
|
192 |
|
193 format %{ "cmpxchgq $mem_ptr,$newval\t# " |
|
194 "If rax == $mem_ptr then store $newval into $mem_ptr\n\t" |
|
195 "sete $res\n\t" |
|
196 "movzbl $res, $res" %} |
|
197 opcode(0x0F, 0xB1); |
|
198 ins_encode(lock_prefix, |
|
199 REX_reg_mem_wide(newval, mem_ptr), |
|
200 OpcP, OpcS, |
|
201 reg_mem(newval, mem_ptr), |
|
202 REX_breg(res), Opcode(0x0F), Opcode(0x94), reg(res), // sete |
|
203 REX_reg_breg(res, res), // movzbl |
|
204 Opcode(0xF), Opcode(0xB6), reg_reg(res, res)); |
|
205 ins_pipe( pipe_cmpxchg ); |
|
206 %} |
|
207 |
|
208 instruct z_xchgP( memory mem, rRegP newval, rRegP keepalive) %{ |
|
209 match(Set newval (ZGetAndSetP mem (Binary newval keepalive))); |
|
210 format %{ "XCHGQ $newval,[$mem]" %} |
|
211 ins_encode %{ |
|
212 __ xchgq($newval$$Register, $mem$$Address); |
|
213 %} |
|
214 ins_pipe( pipe_cmpxchg ); |
|
215 %} |