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1 # |
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2 # Copyright 2005-2007 Sun Microsystems, Inc. All Rights Reserved. |
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3 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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4 # |
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5 # This code is free software; you can redistribute it and/or modify it |
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6 # under the terms of the GNU General Public License version 2 only, as |
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7 # published by the Free Software Foundation. |
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8 # |
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9 # This code is distributed in the hope that it will be useful, but WITHOUT |
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10 # ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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11 # FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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12 # version 2 for more details (a copy is included in the LICENSE file that |
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13 # accompanied this code). |
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14 # |
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15 # You should have received a copy of the GNU General Public License version |
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16 # 2 along with this work; if not, write to the Free Software Foundation, |
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17 # Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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18 # |
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19 # Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
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20 # CA 95054 USA or visit www.sun.com if you need additional information or |
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21 # have any questions. |
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22 # |
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23 |
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24 # Prototype: int SafeFetch32 (int * adr, int ErrValue) |
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25 # The "ld" at Fetch32 is potentially faulting instruction. |
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26 # If the instruction traps the trap handler will arrange |
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27 # for control to resume at Fetch32Resume. |
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28 # By convention with the trap handler we ensure there is a non-CTI |
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29 # instruction in the trap shadow. |
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30 |
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31 |
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32 .globl SafeFetch32, Fetch32PFI, Fetch32Resume |
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33 .globl SafeFetchN |
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34 .align 32 |
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35 .type SafeFetch32,@function |
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36 SafeFetch32: |
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37 mov %o0, %g1 |
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38 mov %o1, %o0 |
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39 Fetch32PFI: |
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40 # <-- Potentially faulting instruction |
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41 ld [%g1], %o0 |
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42 Fetch32Resume: |
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43 nop |
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44 retl |
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45 nop |
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46 |
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47 .globl SafeFetchN, FetchNPFI, FetchNResume |
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48 .type SafeFetchN,@function |
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49 .align 32 |
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50 SafeFetchN: |
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51 mov %o0, %g1 |
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52 mov %o1, %o0 |
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53 FetchNPFI: |
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54 ldn [%g1], %o0 |
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55 FetchNResume: |
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56 nop |
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57 retl |
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58 nop |
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59 |
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60 # Possibilities: |
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61 # -- membar |
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62 # -- CAS (SP + BIAS, G0, G0) |
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63 # -- wr %g0, %asi |
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64 |
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65 .globl SpinPause |
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66 .type SpinPause,@function |
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67 .align 32 |
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68 SpinPause: |
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69 retl |
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70 mov %g0, %o0 |
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71 |
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72 .globl _Copy_conjoint_jlongs_atomic |
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73 .type _Copy_conjoint_jlongs_atomic,@function |
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74 _Copy_conjoint_jlongs_atomic: |
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75 cmp %o0, %o1 |
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76 bleu 4f |
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77 sll %o2, 3, %o4 |
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78 ba 2f |
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79 1: |
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80 subcc %o4, 8, %o4 |
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81 std %o2, [%o1] |
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82 add %o0, 8, %o0 |
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83 add %o1, 8, %o1 |
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84 2: |
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85 bge,a 1b |
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86 ldd [%o0], %o2 |
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87 ba 5f |
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88 nop |
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89 3: |
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90 std %o2, [%o1+%o4] |
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91 4: |
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92 subcc %o4, 8, %o4 |
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93 bge,a 3b |
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94 ldd [%o0+%o4], %o2 |
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95 5: |
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96 retl |
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97 nop |
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98 |
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99 |
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100 .globl _flush_reg_windows |
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101 .align 32 |
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102 _flush_reg_windows: |
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103 ta 0x03 |
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104 retl |
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105 mov %fp, %o0 |