1 /* |
1 /* |
2 * Copyright (c) 1997, 2016, Oracle and/or its affiliates. All rights reserved. |
2 * Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved. |
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * |
4 * |
5 * This code is free software; you can redistribute it and/or modify it |
5 * This code is free software; you can redistribute it and/or modify it |
6 * under the terms of the GNU General Public License version 2 only, as |
6 * under the terms of the GNU General Public License version 2 only, as |
7 * published by the Free Software Foundation. |
7 * published by the Free Software Foundation. |
265 return false; |
265 return false; |
266 } |
266 } |
267 |
267 |
268 #ifndef PRODUCT |
268 #ifndef PRODUCT |
269 void Block::dump_bidx(const Block* orig, outputStream* st) const { |
269 void Block::dump_bidx(const Block* orig, outputStream* st) const { |
270 if (_pre_order) st->print("B%d",_pre_order); |
270 if (_pre_order) st->print("B%d", _pre_order); |
271 else st->print("N%d", head()->_idx); |
271 else st->print("N%d", head()->_idx); |
272 |
272 |
273 if (Verbose && orig != this) { |
273 if (Verbose && orig != this) { |
274 // Dump the original block's idx |
274 // Dump the original block's idx |
275 st->print(" ("); |
275 st->print(" ("); |
289 st->print(" "); |
289 st->print(" "); |
290 } |
290 } |
291 } |
291 } |
292 |
292 |
293 void Block::dump_head(const PhaseCFG* cfg, outputStream* st) const { |
293 void Block::dump_head(const PhaseCFG* cfg, outputStream* st) const { |
294 // Print the basic block |
294 // Print the basic block. |
295 dump_bidx(this, st); |
295 dump_bidx(this, st); |
296 st->print(": #\t"); |
296 st->print(": "); |
297 |
297 |
298 // Print the incoming CFG edges and the outgoing CFG edges |
298 // Print the outgoing CFG edges. |
|
299 st->print("#\tout( "); |
299 for( uint i=0; i<_num_succs; i++ ) { |
300 for( uint i=0; i<_num_succs; i++ ) { |
300 non_connector_successor(i)->dump_bidx(_succs[i], st); |
301 non_connector_successor(i)->dump_bidx(_succs[i], st); |
301 st->print(" "); |
302 st->print(" "); |
302 } |
303 } |
303 st->print("<- "); |
304 |
|
305 // Print the incoming CFG edges. |
|
306 st->print(") <- "); |
304 if( head()->is_block_start() ) { |
307 if( head()->is_block_start() ) { |
|
308 st->print("in( "); |
305 for (uint i=1; i<num_preds(); i++) { |
309 for (uint i=1; i<num_preds(); i++) { |
306 Node *s = pred(i); |
310 Node *s = pred(i); |
307 if (cfg != NULL) { |
311 if (cfg != NULL) { |
308 Block *p = cfg->get_block_for_node(s); |
312 Block *p = cfg->get_block_for_node(s); |
309 p->dump_pred(cfg, p, st); |
313 p->dump_pred(cfg, p, st); |
310 } else { |
314 } else { |
311 while (!s->is_block_start()) |
315 while (!s->is_block_start()) { |
312 s = s->in(0); |
316 s = s->in(0); |
|
317 } |
313 st->print("N%d ", s->_idx ); |
318 st->print("N%d ", s->_idx ); |
314 } |
319 } |
315 } |
320 } |
|
321 st->print(") "); |
316 } else { |
322 } else { |
317 st->print("BLOCK HEAD IS JUNK "); |
323 st->print("BLOCK HEAD IS JUNK "); |
318 } |
324 } |
319 |
325 |
320 // Print loop, if any |
326 // Print loop, if any |
321 const Block *bhead = this; // Head of self-loop |
327 const Block *bhead = this; // Head of self-loop |
322 Node *bh = bhead->head(); |
328 Node *bh = bhead->head(); |
325 LoopNode *loop = bh->as_Loop(); |
331 LoopNode *loop = bh->as_Loop(); |
326 const Block *bx = cfg->get_block_for_node(loop->in(LoopNode::LoopBackControl)); |
332 const Block *bx = cfg->get_block_for_node(loop->in(LoopNode::LoopBackControl)); |
327 while (bx->is_connector()) { |
333 while (bx->is_connector()) { |
328 bx = cfg->get_block_for_node(bx->pred(1)); |
334 bx = cfg->get_block_for_node(bx->pred(1)); |
329 } |
335 } |
330 st->print("\tLoop: B%d-B%d ", bhead->_pre_order, bx->_pre_order); |
336 st->print("Loop( B%d-B%d ", bhead->_pre_order, bx->_pre_order); |
331 // Dump any loop-specific bits, especially for CountedLoops. |
337 // Dump any loop-specific bits, especially for CountedLoops. |
332 loop->dump_spec(st); |
338 loop->dump_spec(st); |
|
339 st->print(")"); |
333 } else if (has_loop_alignment()) { |
340 } else if (has_loop_alignment()) { |
334 st->print(" top-of-loop"); |
341 st->print("top-of-loop"); |
335 } |
342 } |
|
343 |
|
344 // Print frequency and other optimization-relevant information |
336 st->print(" Freq: %g",_freq); |
345 st->print(" Freq: %g",_freq); |
337 if( Verbose || WizardMode ) { |
346 if( Verbose || WizardMode ) { |
338 st->print(" IDom: %d/#%d", _idom ? _idom->_pre_order : 0, _dom_depth); |
347 st->print(" IDom: %d/#%d", _idom ? _idom->_pre_order : 0, _dom_depth); |
339 st->print(" RegPressure: %d",_reg_pressure); |
348 st->print(" RegPressure: %d",_reg_pressure); |
340 st->print(" IHRP Index: %d",_ihrp_index); |
349 st->print(" IHRP Index: %d",_ihrp_index); |