equal
deleted
inserted
replaced
72 : 1, |
72 : 1, |
73 est : 1, |
73 est : 1, |
74 : 1, |
74 : 1, |
75 ssse3 : 1, |
75 ssse3 : 1, |
76 cid : 1, |
76 cid : 1, |
77 : 2, |
77 : 1, |
|
78 fma : 1, |
78 cmpxchg16: 1, |
79 cmpxchg16: 1, |
79 : 4, |
80 : 4, |
80 dca : 1, |
81 dca : 1, |
81 sse4_1 : 1, |
82 sse4_1 : 1, |
82 sse4_2 : 1, |
83 sse4_2 : 1, |
287 }; |
288 }; |
288 |
289 |
289 #define CPU_AVX512BW ((uint64_t)UCONST64(0x100000000)) // enums are limited to 31 bit |
290 #define CPU_AVX512BW ((uint64_t)UCONST64(0x100000000)) // enums are limited to 31 bit |
290 #define CPU_AVX512VL ((uint64_t)UCONST64(0x200000000)) // EVEX instructions with smaller vector length |
291 #define CPU_AVX512VL ((uint64_t)UCONST64(0x200000000)) // EVEX instructions with smaller vector length |
291 #define CPU_SHA ((uint64_t)UCONST64(0x400000000)) // SHA instructions |
292 #define CPU_SHA ((uint64_t)UCONST64(0x400000000)) // SHA instructions |
|
293 #define CPU_FMA ((uint64_t)UCONST64(0x800000000)) // FMA instructions |
292 |
294 |
293 enum Extended_Family { |
295 enum Extended_Family { |
294 // AMD |
296 // AMD |
295 CPU_FAMILY_AMD_11H = 0x11, |
297 CPU_FAMILY_AMD_11H = 0x11, |
296 // Intel |
298 // Intel |
520 result |= CPU_BMI2; |
522 result |= CPU_BMI2; |
521 if (_cpuid_info.sef_cpuid7_ebx.bits.sha != 0) |
523 if (_cpuid_info.sef_cpuid7_ebx.bits.sha != 0) |
522 result |= CPU_SHA; |
524 result |= CPU_SHA; |
523 if(_cpuid_info.ext_cpuid1_ecx.bits.lzcnt_intel != 0) |
525 if(_cpuid_info.ext_cpuid1_ecx.bits.lzcnt_intel != 0) |
524 result |= CPU_LZCNT; |
526 result |= CPU_LZCNT; |
|
527 if (_cpuid_info.std_cpuid1_ecx.bits.fma != 0) |
|
528 result |= CPU_FMA; |
525 // for Intel, ecx.bits.misalignsse bit (bit 8) indicates support for prefetchw |
529 // for Intel, ecx.bits.misalignsse bit (bit 8) indicates support for prefetchw |
526 if (_cpuid_info.ext_cpuid1_ecx.bits.misalignsse != 0) { |
530 if (_cpuid_info.ext_cpuid1_ecx.bits.misalignsse != 0) { |
527 result |= CPU_3DNOW_PREFETCH; |
531 result |= CPU_3DNOW_PREFETCH; |
528 } |
532 } |
529 } |
533 } |
724 static bool supports_avx512novl() { return (supports_evex() && !supports_avx512vl()); } |
728 static bool supports_avx512novl() { return (supports_evex() && !supports_avx512vl()); } |
725 static bool supports_avx512nobw() { return (supports_evex() && !supports_avx512bw()); } |
729 static bool supports_avx512nobw() { return (supports_evex() && !supports_avx512bw()); } |
726 static bool supports_avx256only() { return (supports_avx2() && !supports_evex()); } |
730 static bool supports_avx256only() { return (supports_avx2() && !supports_evex()); } |
727 static bool supports_avxonly() { return ((supports_avx2() || supports_avx()) && !supports_evex()); } |
731 static bool supports_avxonly() { return ((supports_avx2() || supports_avx()) && !supports_evex()); } |
728 static bool supports_sha() { return (_features & CPU_SHA) != 0; } |
732 static bool supports_sha() { return (_features & CPU_SHA) != 0; } |
|
733 static bool supports_fma() { return (_features & CPU_FMA) != 0; } |
729 // Intel features |
734 // Intel features |
730 static bool is_intel_family_core() { return is_intel() && |
735 static bool is_intel_family_core() { return is_intel() && |
731 extended_cpu_family() == CPU_FAMILY_INTEL_CORE; } |
736 extended_cpu_family() == CPU_FAMILY_INTEL_CORE; } |
732 |
737 |
733 static bool is_intel_tsc_synched_at_init() { |
738 static bool is_intel_tsc_synched_at_init() { |