equal
deleted
inserted
replaced
1271 // when an instruction is a call, a temp range is created for all these registers |
1271 // when an instruction is a call, a temp range is created for all these registers |
1272 int num_caller_save_registers = 0; |
1272 int num_caller_save_registers = 0; |
1273 int caller_save_registers[LinearScan::nof_regs]; |
1273 int caller_save_registers[LinearScan::nof_regs]; |
1274 |
1274 |
1275 int i; |
1275 int i; |
1276 for (i = 0; i < FrameMap::nof_caller_save_cpu_regs; i++) { |
1276 for (i = 0; i < FrameMap::nof_caller_save_cpu_regs(); i++) { |
1277 LIR_Opr opr = FrameMap::caller_save_cpu_reg_at(i); |
1277 LIR_Opr opr = FrameMap::caller_save_cpu_reg_at(i); |
1278 assert(opr->is_valid() && opr->is_register(), "FrameMap should not return invalid operands"); |
1278 assert(opr->is_valid() && opr->is_register(), "FrameMap should not return invalid operands"); |
1279 assert(reg_numHi(opr) == -1, "missing addition of range for hi-register"); |
1279 assert(reg_numHi(opr) == -1, "missing addition of range for hi-register"); |
1280 caller_save_registers[num_caller_save_registers++] = reg_num(opr); |
1280 caller_save_registers[num_caller_save_registers++] = reg_num(opr); |
1281 } |
1281 } |
3555 } |
3555 } |
3556 } |
3556 } |
3557 |
3557 |
3558 // invalidate all caller save registers at calls |
3558 // invalidate all caller save registers at calls |
3559 if (visitor.has_call()) { |
3559 if (visitor.has_call()) { |
3560 for (j = 0; j < FrameMap::nof_caller_save_cpu_regs; j++) { |
3560 for (j = 0; j < FrameMap::nof_caller_save_cpu_regs(); j++) { |
3561 state_put(input_state, reg_num(FrameMap::caller_save_cpu_reg_at(j)), NULL); |
3561 state_put(input_state, reg_num(FrameMap::caller_save_cpu_reg_at(j)), NULL); |
3562 } |
3562 } |
3563 for (j = 0; j < FrameMap::nof_caller_save_fpu_regs; j++) { |
3563 for (j = 0; j < FrameMap::nof_caller_save_fpu_regs; j++) { |
3564 state_put(input_state, reg_num(FrameMap::caller_save_fpu_reg_at(j)), NULL); |
3564 state_put(input_state, reg_num(FrameMap::caller_save_fpu_reg_at(j)), NULL); |
3565 } |
3565 } |
5594 } else if (type == T_FLOAT || type == T_DOUBLE) { |
5594 } else if (type == T_FLOAT || type == T_DOUBLE) { |
5595 _first_reg = pd_first_fpu_reg; |
5595 _first_reg = pd_first_fpu_reg; |
5596 _last_reg = pd_last_fpu_reg; |
5596 _last_reg = pd_last_fpu_reg; |
5597 } else { |
5597 } else { |
5598 _first_reg = pd_first_cpu_reg; |
5598 _first_reg = pd_first_cpu_reg; |
5599 _last_reg = pd_last_cpu_reg; |
5599 _last_reg = FrameMap::last_cpu_reg(); |
5600 } |
5600 } |
5601 |
5601 |
5602 assert(0 <= _first_reg && _first_reg < LinearScan::nof_regs, "out of range"); |
5602 assert(0 <= _first_reg && _first_reg < LinearScan::nof_regs, "out of range"); |
5603 assert(0 <= _last_reg && _last_reg < LinearScan::nof_regs, "out of range"); |
5603 assert(0 <= _last_reg && _last_reg < LinearScan::nof_regs, "out of range"); |
5604 } |
5604 } |