1 /* |
1 /* |
2 * Copyright 1997-2006 Sun Microsystems, Inc. All Rights Reserved. |
2 * Copyright 1997-2009 Sun Microsystems, Inc. All Rights Reserved. |
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * |
4 * |
5 * This code is free software; you can redistribute it and/or modify it |
5 * This code is free software; you can redistribute it and/or modify it |
6 * under the terms of the GNU General Public License version 2 only, as |
6 * under the terms of the GNU General Public License version 2 only, as |
7 * published by the Free Software Foundation. |
7 * published by the Free Software Foundation. |
44 // note: even though the code contains an embedded oop, we do not need reloc info |
44 // note: even though the code contains an embedded oop, we do not need reloc info |
45 // because |
45 // because |
46 // (1) the oop is old (i.e., doesn't matter for scavenges) |
46 // (1) the oop is old (i.e., doesn't matter for scavenges) |
47 // (2) these ICStubs are removed *before* a GC happens, so the roots disappear |
47 // (2) these ICStubs are removed *before* a GC happens, so the roots disappear |
48 assert(cached_oop == NULL || cached_oop->is_perm(), "must be old oop"); |
48 assert(cached_oop == NULL || cached_oop->is_perm(), "must be old oop"); |
49 Address cached_oop_addr(G5_inline_cache_reg, address(cached_oop)); |
49 AddressLiteral cached_oop_addrlit(cached_oop, relocInfo::none); |
50 // Force the sethi to generate the fixed sequence so next_instruction_address works |
50 // Force the set to generate the fixed sequence so next_instruction_address works |
51 masm->sethi(cached_oop_addr, true /* ForceRelocatable */ ); |
51 masm->patchable_set(cached_oop_addrlit, G5_inline_cache_reg); |
52 masm->add(cached_oop_addr, G5_inline_cache_reg); |
|
53 assert(G3_scratch != G5_method, "Do not clobber the method oop in the transition stub"); |
52 assert(G3_scratch != G5_method, "Do not clobber the method oop in the transition stub"); |
54 assert(G3_scratch != G5_inline_cache_reg, "Do not clobber the inline cache register in the transition stub"); |
53 assert(G3_scratch != G5_inline_cache_reg, "Do not clobber the inline cache register in the transition stub"); |
55 Address entry(G3_scratch, entry_point); |
54 AddressLiteral entry(entry_point); |
56 masm->JUMP(entry, 0); |
55 masm->JUMP(entry, G3_scratch, 0); |
57 masm->delayed()->nop(); |
56 masm->delayed()->nop(); |
58 masm->flush(); |
57 masm->flush(); |
59 } |
58 } |
60 |
59 |
61 |
60 |