jdk-sandbox: comparison hotspot/src/cpu/sparc/vm/c1_LIRAssembler

equal deleted inserted replaced

-:9e8daec25638
+:d602ad6538bd
 int slot_offset = monitor_offset - ((i * BasicObjectLock::size()) * BytesPerWord);
 #ifdef ASSERT
 // verify the interpreter's monitor has a non-null object
 {
 Label L;
-__ ld_ptr(Address(OSR_buf, 0, slot_offset + BasicObjectLock::obj_offset_in_bytes()), O7);
+__ ld_ptr(OSR_buf, slot_offset + BasicObjectLock::obj_offset_in_bytes(), O7);
 __ cmp(G0, O7);
 __ br(Assembler::notEqual, false, Assembler::pt, L);
 __ delayed()->nop();
 __ stop("locked object is NULL");
 __ bind(L);
 }
 #endif // ASSERT
 // Copy the lock field into the compiled activation.
-__ ld_ptr(Address(OSR_buf, 0, slot_offset + BasicObjectLock::lock_offset_in_bytes()), O7);
+__ ld_ptr(OSR_buf, slot_offset + BasicObjectLock::lock_offset_in_bytes(), O7);
 __ st_ptr(O7, frame_map()->address_for_monitor_lock(i));
-__ ld_ptr(Address(OSR_buf, 0, slot_offset + BasicObjectLock::obj_offset_in_bytes()), O7);
+__ ld_ptr(OSR_buf, slot_offset + BasicObjectLock::obj_offset_in_bytes(), O7);
 __ st_ptr(O7, frame_map()->address_for_monitor_object(i));
 }
 }
 }
 int  value_offset = java_lang_String:: value_offset_in_bytes(); // char array
 int offset_offset = java_lang_String::offset_offset_in_bytes(); // first character position
 int  count_offset = java_lang_String:: count_offset_in_bytes();
-__ ld_ptr(Address(str0, 0,  value_offset), tmp0);
+__ ld_ptr(str0, value_offset, tmp0);
-__ ld(Address(str0, 0, offset_offset), tmp2);
+__ ld(str0, offset_offset, tmp2);
 __ add(tmp0, arrayOopDesc::base_offset_in_bytes(T_CHAR), tmp0);
-__ ld(Address(str0, 0, count_offset), str0);
+__ ld(str0, count_offset, str0);
 __ sll(tmp2, exact_log2(sizeof(jchar)), tmp2);
 // str1 may be null
 add_debug_info_for_null_check_here(info);
-__ ld_ptr(Address(str1, 0,  value_offset), tmp1);
+__ ld_ptr(str1, value_offset, tmp1);
 __ add(tmp0, tmp2, tmp0);
-__ ld(Address(str1, 0, offset_offset), tmp2);
+__ ld(str1, offset_offset, tmp2);
 __ add(tmp1, arrayOopDesc::base_offset_in_bytes(T_CHAR), tmp1);
-__ ld(Address(str1, 0, count_offset), str1);
+__ ld(str1, count_offset, str1);
 __ sll(tmp2, exact_log2(sizeof(jchar)), tmp2);
 __ subcc(str0, str1, O7);
 __ add(tmp1, tmp2, tmp1);
 }
 #ifdef ASSERT
 int offset = code_offset();
 #endif // ASSERT
 compilation()->offsets()->set_value(CodeOffsets::Deopt, code_offset());
-Address deopt_blob(G3_scratch, SharedRuntime::deopt_blob()->unpack());
+AddressLiteral deopt_blob(SharedRuntime::deopt_blob()->unpack());
-__ JUMP(deopt_blob, 0); // sethi;jmp
+__ JUMP(deopt_blob, G3_scratch, 0); // sethi;jmp
 __ delayed()->nop();
 assert(code_offset() - offset <= deopt_handler_size, "overflow");
 debug_only(__ stop("should have gone to the caller");)
 void LIR_Assembler::jobject2reg_with_patching(Register reg, CodeEmitInfo *info) {
 // Allocate a new index in oop table to hold the oop once it's been patched
 int oop_index = __ oop_recorder()->allocate_index((jobject)NULL);
 PatchingStub* patch = new PatchingStub(_masm, PatchingStub::load_klass_id, oop_index);
-Address addr = Address(reg, address(NULL), oop_Relocation::spec(oop_index));
+AddressLiteral addrlit(NULL, oop_Relocation::spec(oop_index));
-assert(addr.rspec().type() == relocInfo::oop_type, "must be an oop reloc");
+assert(addrlit.rspec().type() == relocInfo::oop_type, "must be an oop reloc");
 // It may not seem necessary to use a sethi/add pair to load a NULL into dest, but the
 // NULL will be dynamically patched later and the patched value may be large.  We must
 // therefore generate the sethi/add as a placeholders
-__ sethi(addr, true);
+__ patchable_set(addrlit, reg);
-__ add(addr, reg, 0);
 patching_epilog(patch, lir_patch_normal, reg, info);
 }
 }
 void LIR_Assembler::vtable_call(int vtable_offset, CodeEmitInfo* info) {
 add_debug_info_for_null_check_here(info);
-__ ld_ptr(Address(O0, 0,  oopDesc::klass_offset_in_bytes()), G3_scratch);
+__ ld_ptr(O0, oopDesc::klass_offset_in_bytes(), G3_scratch);
 if (__ is_simm13(vtable_offset) ) {
 __ ld_ptr(G3_scratch, vtable_offset, G5_method);
 } else {
 // This will generate 2 instructions
 __ set(vtable_offset, G5_method);
 // ld_ptr, set_hi, set
 __ ld_ptr(G3_scratch, G5_method, G5_method);
 }
-__ ld_ptr(G5_method, in_bytes(methodOopDesc::from_compiled_offset()), G3_scratch);
+__ ld_ptr(G5_method, methodOopDesc::from_compiled_offset(), G3_scratch);
 __ callr(G3_scratch, G0);
 // the peephole pass fills the delay slot
 }
 case T_ARRAY : // fall through
 case T_OBJECT: __ ld_ptr(s, disp, d); break;
 default      : ShouldNotReachHere();
 }
 } else {
-__ sethi(disp & ~0x3ff, O7, true);
+__ set(disp, O7);
-__ add(O7, disp & 0x3ff, O7);
 if (info != NULL) add_debug_info_for_null_check_here(info);
 load_offset = code_offset();
 switch(ld_type) {
 case T_BOOLEAN: // fall through
 case T_BYTE  : __ ldsb(s, O7, d); break;
 case T_ARRAY : // fall through
 case T_OBJECT: __ st_ptr(value, base, offset); break;
 default      : ShouldNotReachHere();
 }
 } else {
-__ sethi(offset & ~0x3ff, O7, true);
+__ set(offset, O7);
-__ add(O7, offset & 0x3ff, O7);
 if (info != NULL) add_debug_info_for_null_check_here(info);
 switch (type) {
 case T_BOOLEAN: // fall through
 case T_BYTE  : __ stb(value, base, O7); break;
 case T_CHAR  : __ sth(value, base, O7); break;
 __ ldf(FloatRegisterImpl::S, s, disp               , d);
 } else {
 __ ldf(w, s, disp, d);
 }
 } else {
-__ sethi(disp & ~0x3ff, O7, true);
+__ set(disp, O7);
-__ add(O7, disp & 0x3ff, O7);
 if (info != NULL) add_debug_info_for_null_check_here(info);
 __ ldf(w, s, O7, d);
 }
 }
 __ stf(FloatRegisterImpl::S, value             , base, offset);
 } else {
 __ stf(w, value, base, offset);
 }
 } else {
-__ sethi(offset & ~0x3ff, O7, true);
+__ set(offset, O7);
-__ add(O7, offset & 0x3ff, O7);
 if (info != NULL) add_debug_info_for_null_check_here(info);
 __ stf(w, value, O7, base);
 }
 }
 int LIR_Assembler::store(LIR_Opr from_reg, Register base, int offset, BasicType type, bool unaligned) {
 int store_offset;
 if (!Assembler::is_simm13(offset + (type == T_LONG) ? wordSize : 0)) {
 assert(!unaligned, "can't handle this");
 // for offsets larger than a simm13 we setup the offset in O7
-__ sethi(offset & ~0x3ff, O7, true);
+__ set(offset, O7);
-__ add(O7, offset & 0x3ff, O7);
 store_offset = store(from_reg, base, O7, type);
 } else {
 if (type == T_ARRAY || type == T_OBJECT) __ verify_oop(from_reg->as_register());
 store_offset = code_offset();
 switch (type) {
 int load_offset;
 if (!Assembler::is_simm13(offset + (type == T_LONG) ? wordSize : 0)) {
 assert(base != O7, "destroying register");
 assert(!unaligned, "can't handle this");
 // for offsets larger than a simm13 we setup the offset in O7
-__ sethi(offset & ~0x3ff, O7, true);
+__ set(offset, O7);
-__ add(O7, offset & 0x3ff, O7);
 load_offset = load(base, O7, to_reg, type);
 } else {
 load_offset = code_offset();
 switch(type) {
 case T_BOOLEAN: // fall through
 } else {
 ShouldNotReachHere();
 assert(to_reg->is_single_fpu(), "wrong register kind");
 __ set(con, O7);
-Address temp_slot(SP, 0, (frame::register_save_words * wordSize) + STACK_BIAS);
+Address temp_slot(SP, (frame::register_save_words * wordSize) + STACK_BIAS);
 __ st(O7, temp_slot);
 __ ldf(FloatRegisterImpl::S, temp_slot, to_reg->as_float_reg());
 }
 }
 break;
 __ set(con, to_reg->as_register());
 #endif
 } else {
 ShouldNotReachHere();
 assert(to_reg->is_double_fpu(), "wrong register kind");
-Address temp_slot_lo(SP, 0, ((frame::register_save_words  ) * wordSize) + STACK_BIAS);
+Address temp_slot_lo(SP, ((frame::register_save_words  ) * wordSize) + STACK_BIAS);
-Address temp_slot_hi(SP, 0, ((frame::register_save_words) * wordSize) + (longSize/2) + STACK_BIAS);
+Address temp_slot_hi(SP, ((frame::register_save_words) * wordSize) + (longSize/2) + STACK_BIAS);
 __ set(low(con),  O7);
 __ st(O7, temp_slot_lo);
 __ set(high(con), O7);
 __ st(O7, temp_slot_hi);
 __ ldf(FloatRegisterImpl::D, temp_slot_lo, to_reg->as_double_reg());
 if (const_addr == NULL) {
 bailout("const section overflow");
 break;
 }
 RelocationHolder rspec = internal_word_Relocation::spec(const_addr);
+AddressLiteral const_addrlit(const_addr, rspec);
 if (to_reg->is_single_fpu()) {
-__ sethi(  (intx)const_addr & ~0x3ff, O7, true, rspec);
+__ patchable_sethi(const_addrlit, O7);
 __ relocate(rspec);
+__ ldf(FloatRegisterImpl::S, O7, const_addrlit.low10(), to_reg->as_float_reg());
-int offset = (intx)const_addr & 0x3ff;
-__ ldf (FloatRegisterImpl::S, O7, offset, to_reg->as_float_reg());
 } else {
 assert(to_reg->is_single_cpu(), "Must be a cpu register.");
-__ set((intx)const_addr, O7, rspec);
+__ set(const_addrlit, O7);
 load(O7, 0, to_reg->as_register(), T_INT);
 }
 }
 break;
 break;
 }
 RelocationHolder rspec = internal_word_Relocation::spec(const_addr);
 if (to_reg->is_double_fpu()) {
-__ sethi(  (intx)const_addr & ~0x3ff, O7, true, rspec);
+AddressLiteral const_addrlit(const_addr, rspec);
-int offset = (intx)const_addr & 0x3ff;
+__ patchable_sethi(const_addrlit, O7);
 __ relocate(rspec);
-__ ldf (FloatRegisterImpl::D, O7, offset, to_reg->as_double_reg());
+__ ldf (FloatRegisterImpl::D, O7, const_addrlit.low10(), to_reg->as_double_reg());
 } else {
 assert(to_reg->is_double_cpu(), "Must be a long register.");
 #ifdef _LP64
 __ set(jlong_cast(c->as_jdouble()), to_reg->as_register_lo());
 #else
 }
 }
 Address LIR_Assembler::as_Address(LIR_Address* addr) {
 Register reg = addr->base()->as_register();
-return Address(reg, 0, addr->disp());
+return Address(reg, addr->disp());
 }
 void LIR_Assembler::stack2stack(LIR_Opr src, LIR_Opr dest, BasicType type) {
 switch (type) {
 }
 Address LIR_Assembler::as_Address_hi(LIR_Address* addr) {
 Address base = as_Address(addr);
-return Address(base.base(), 0, base.disp() + hi_word_offset_in_bytes);
+return Address(base.base(), base.disp() + hi_word_offset_in_bytes);
 }
 Address LIR_Assembler::as_Address_lo(LIR_Address* addr) {
 Address base = as_Address(addr);
-return Address(base.base(), 0, base.disp() + lo_word_offset_in_bytes);
+return Address(base.base(), base.disp() + lo_word_offset_in_bytes);
 }
 void LIR_Assembler::mem2reg(LIR_Opr src_opr, LIR_Opr dest, BasicType type,
 LIR_PatchCode patch_code, CodeEmitInfo* info, bool unaligned) {
 }
 if (addr->index()->is_illegal()) {
 if (!Assembler::is_simm13(disp_value) && (!unaligned || Assembler::is_simm13(disp_value + 4))) {
 if (needs_patching) {
-__ sethi(0, O7, true);
+__ patchable_set(0, O7);
-__ add(O7, 0, O7);
 } else {
 __ set(disp_value, O7);
 }
 disp_reg = O7;
 }
 }
 if (addr->index()->is_illegal()) {
 if (!Assembler::is_simm13(disp_value) && (!unaligned || Assembler::is_simm13(disp_value + 4))) {
 if (needs_patching) {
-__ sethi(0, O7, true);
+__ patchable_set(0, O7);
-__ add(O7, 0, O7);
 } else {
 __ set(disp_value, O7);
 }
 disp_reg = O7;
 }
 int start = __ offset();
 __ relocate(static_stub_Relocation::spec(call_pc));
 __ set_oop(NULL, G5);
 // must be set to -1 at code generation time
-Address a(G3, (address)-1);
+AddressLiteral addrlit(-1);
-__ jump_to(a, 0);
+__ jump_to(addrlit, G3);
 __ delayed()->nop();
 assert(__ offset() - start <= call_stub_size, "stub too big");
 __ end_a_stub();
 }
 } else {
 // reuse the debug info from the safepoint poll for the throw op itself
 address pc_for_athrow  = __ pc();
 int pc_for_athrow_offset = __ offset();
 RelocationHolder rspec = internal_word_Relocation::spec(pc_for_athrow);
-__ set((intptr_t)pc_for_athrow, Oissuing_pc, rspec);
+__ set(pc_for_athrow, Oissuing_pc, rspec);
 add_call_info(pc_for_athrow_offset, info); // for exception handler
 __ call(Runtime1::entry_for(Runtime1::handle_exception_id), relocInfo::runtime_call_type);
 __ delayed()->nop();
 }
 __ set(mdo_offset_bias, data_val);
 __ add(mdo, data_val, mdo);
 }
-Address flags_addr(mdo, 0, md->byte_offset_of_slot(data, DataLayout::flags_offset()) - mdo_offset_bias);
+Address flags_addr(mdo, md->byte_offset_of_slot(data, DataLayout::flags_offset()) - mdo_offset_bias);
 __ ldub(flags_addr, data_val);
 __ or3(data_val, BitData::null_seen_byte_constant(), data_val);
 __ stb(data_val, flags_addr);
 __ bind(profile_done);
 }
 mdo_offset_bias = md->byte_offset_of_slot(data, CounterData::count_offset());
 __ set(mdo_offset_bias, O7);
 __ add(mdo, O7, mdo);
 }
-Address counter_addr(mdo, 0, md->byte_offset_of_slot(data, CounterData::count_offset()) - mdo_offset_bias);
+Address counter_addr(mdo, md->byte_offset_of_slot(data, CounterData::count_offset()) - mdo_offset_bias);
 __ lduw(counter_addr, tmp1);
 __ add(tmp1, DataLayout::counter_increment, tmp1);
 __ stw(tmp1, counter_addr);
 Bytecodes::Code bc = method->java_code_at_bci(bci);
 // Perform additional virtual call profiling for invokevirtual and
 ciVirtualCallData* vc_data = (ciVirtualCallData*) data;
 uint i;
 for (i = 0; i < VirtualCallData::row_limit(); i++) {
 ciKlass* receiver = vc_data->receiver(i);
 if (known_klass->equals(receiver)) {
-Address data_addr(mdo, 0, md->byte_offset_of_slot(data,
+Address data_addr(mdo, md->byte_offset_of_slot(data,
 VirtualCallData::receiver_count_offset(i)) -
 mdo_offset_bias);
 __ lduw(data_addr, tmp1);
 __ add(tmp1, DataLayout::counter_increment, tmp1);
 __ stw(tmp1, data_addr);
 return;
 // always does a write to the receiver part of the
 // VirtualCallData rather than just the first time
 for (i = 0; i < VirtualCallData::row_limit(); i++) {
 ciKlass* receiver = vc_data->receiver(i);
 if (receiver == NULL) {
-Address recv_addr(mdo, 0, md->byte_offset_of_slot(data, VirtualCallData::receiver_offset(i)) -
+Address recv_addr(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_offset(i)) -
 mdo_offset_bias);
 jobject2reg(known_klass->encoding(), tmp1);
 __ st_ptr(tmp1, recv_addr);
-Address data_addr(mdo, 0, md->byte_offset_of_slot(data, VirtualCallData::receiver_count_offset(i)) -
+Address data_addr(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_count_offset(i)) -
 mdo_offset_bias);
 __ lduw(data_addr, tmp1);
 __ add(tmp1, DataLayout::counter_increment, tmp1);
 __ stw(tmp1, data_addr);
 return;
 }
 }
 } else {
-load(Address(recv, 0, oopDesc::klass_offset_in_bytes()), recv, T_OBJECT);
+load(Address(recv, oopDesc::klass_offset_in_bytes()), recv, T_OBJECT);
 Label update_done;
 uint i;
 for (i = 0; i < VirtualCallData::row_limit(); i++) {
 Label next_test;
 // See if the receiver is receiver[n].
-Address receiver_addr(mdo, 0, md->byte_offset_of_slot(data, VirtualCallData::receiver_offset(i)) -
+Address receiver_addr(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_offset(i)) -
 mdo_offset_bias);
 __ ld_ptr(receiver_addr, tmp1);
 __ verify_oop(tmp1);
 __ cmp(recv, tmp1);
 __ brx(Assembler::notEqual, false, Assembler::pt, next_test);
 __ delayed()->nop();
-Address data_addr(mdo, 0, md->byte_offset_of_slot(data, VirtualCallData::receiver_count_offset(i)) -
+Address data_addr(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_count_offset(i)) -
 mdo_offset_bias);
 __ lduw(data_addr, tmp1);
 __ add(tmp1, DataLayout::counter_increment, tmp1);
 __ stw(tmp1, data_addr);
 __ br(Assembler::always, false, Assembler::pt, update_done);
 }
 // Didn't find receiver; find next empty slot and fill it in
 for (i = 0; i < VirtualCallData::row_limit(); i++) {
 Label next_test;
-Address recv_addr(mdo, 0, md->byte_offset_of_slot(data, VirtualCallData::receiver_offset(i)) -
+Address recv_addr(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_offset(i)) -
 mdo_offset_bias);
 load(recv_addr, tmp1, T_OBJECT);
 __ tst(tmp1);
 __ brx(Assembler::notEqual, false, Assembler::pt, next_test);
 __ delayed()->nop();
 __ st_ptr(recv, recv_addr);
 __ set(DataLayout::counter_increment, tmp1);
-__ st_ptr(tmp1, Address(mdo, 0, md->byte_offset_of_slot(data, VirtualCallData::receiver_count_offset(i)) -
+__ st_ptr(tmp1, mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_count_offset(i)) -
-mdo_offset_bias));
+mdo_offset_bias);
 if (i < (VirtualCallData::row_limit() - 1)) {
 __ br(Assembler::always, false, Assembler::pt, update_done);
 __ delayed()->nop();
 }
 __ bind(next_test);

changeset 2571	d602ad6538bd
parent 2332	5c7b6f4ce0a1
child 2867	69187054225f