equal
deleted
inserted
replaced
31 } |
31 } |
32 |
32 |
33 inline VMReg FloatRegisterImpl::as_VMReg() { return VMRegImpl::as_VMReg( ConcreteRegisterImpl::max_gpr + encoding() ); } |
33 inline VMReg FloatRegisterImpl::as_VMReg() { return VMRegImpl::as_VMReg( ConcreteRegisterImpl::max_gpr + encoding() ); } |
34 |
34 |
35 |
35 |
36 inline bool VMRegImpl::is_Register() { return value() >= 0 && value() < ConcreteRegisterImpl::max_gpr; } |
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37 inline bool VMRegImpl::is_FloatRegister() { return value() >= ConcreteRegisterImpl::max_gpr && |
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38 value() < ConcreteRegisterImpl::max_fpr; } |
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39 inline Register VMRegImpl::as_Register() { |
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40 |
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41 assert( is_Register() && is_even(value()), "even-aligned GPR name" ); |
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42 // Yuk |
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43 return ::as_Register(value()>>1); |
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44 } |
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45 |
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46 inline FloatRegister VMRegImpl::as_FloatRegister() { |
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47 assert( is_FloatRegister(), "must be" ); |
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48 // Yuk |
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49 return ::as_FloatRegister( value() - ConcreteRegisterImpl::max_gpr ); |
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50 } |
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51 |
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52 inline bool VMRegImpl::is_concrete() { |
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53 assert(is_reg(), "must be"); |
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54 int v = value(); |
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55 if ( v < ConcreteRegisterImpl::max_gpr ) { |
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56 return is_even(v); |
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57 } |
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58 // F0..F31 |
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59 if ( v <= ConcreteRegisterImpl::max_gpr + 31) return true; |
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60 if ( v < ConcreteRegisterImpl::max_fpr) { |
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61 return is_even(v); |
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62 } |
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63 assert(false, "what register?"); |
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64 return false; |
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65 } |
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66 |
36 |
67 #endif // CPU_SPARC_VM_VMREG_SPARC_INLINE_HPP |
37 #endif // CPU_SPARC_VM_VMREG_SPARC_INLINE_HPP |