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23 */ |
23 */ |
24 |
24 |
25 #ifndef CPU_SPARC_VM_VMREG_SPARC_HPP |
25 #ifndef CPU_SPARC_VM_VMREG_SPARC_HPP |
26 #define CPU_SPARC_VM_VMREG_SPARC_HPP |
26 #define CPU_SPARC_VM_VMREG_SPARC_HPP |
27 |
27 |
28 bool is_Register(); |
28 inline bool is_Register() { return value() >= 0 && value() < ConcreteRegisterImpl::max_gpr; } |
29 Register as_Register(); |
29 inline bool is_FloatRegister() { return value() >= ConcreteRegisterImpl::max_gpr && |
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30 value() < ConcreteRegisterImpl::max_fpr; } |
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31 inline Register as_Register() { |
30 |
32 |
31 bool is_FloatRegister(); |
33 assert( is_Register() && is_even(value()), "even-aligned GPR name" ); |
32 FloatRegister as_FloatRegister(); |
34 // Yuk |
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35 return ::as_Register(value()>>1); |
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36 } |
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37 |
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38 inline FloatRegister as_FloatRegister() { |
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39 assert( is_FloatRegister(), "must be" ); |
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40 // Yuk |
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41 return ::as_FloatRegister( value() - ConcreteRegisterImpl::max_gpr ); |
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42 } |
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43 |
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44 inline bool is_concrete() { |
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45 assert(is_reg(), "must be"); |
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46 int v = value(); |
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47 if ( v < ConcreteRegisterImpl::max_gpr ) { |
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48 return is_even(v); |
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49 } |
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50 // F0..F31 |
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51 if ( v <= ConcreteRegisterImpl::max_gpr + 31) return true; |
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52 if ( v < ConcreteRegisterImpl::max_fpr) { |
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53 return is_even(v); |
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54 } |
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55 assert(false, "what register?"); |
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56 return false; |
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57 } |
33 |
58 |
34 #endif // CPU_SPARC_VM_VMREG_SPARC_HPP |
59 #endif // CPU_SPARC_VM_VMREG_SPARC_HPP |