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1 // |
1 // |
2 // Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved. |
2 // Copyright (c) 2002, 2015, Oracle and/or its affiliates. All rights reserved. |
3 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
3 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 // |
4 // |
5 // This code is free software; you can redistribute it and/or modify it |
5 // This code is free software; you can redistribute it and/or modify it |
6 // under the terms of the GNU General Public License version 2 only, as |
6 // under the terms of the GNU General Public License version 2 only, as |
7 // published by the Free Software Foundation. |
7 // published by the Free Software Foundation. |
17 // Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
17 // Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
18 // |
18 // |
19 // Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
19 // Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
20 // or visit www.oracle.com if you need additional information or have any |
20 // or visit www.oracle.com if you need additional information or have any |
21 // questions. |
21 // questions. |
22 // |
22 // |
23 // |
23 // |
24 |
24 |
25 // Get the raw thread ID from %g7 |
25 // Get the raw thread ID from %g7 |
26 |
26 |
27 .inline _raw_thread_id, 0 |
27 .inline _raw_thread_id, 0 |
33 |
33 |
34 |
34 |
35 // Clear SPARC fprs.FEF DU and DL bits -- |
35 // Clear SPARC fprs.FEF DU and DL bits -- |
36 // allows the kernel to avoid saving FPU state at context-switch time. |
36 // allows the kernel to avoid saving FPU state at context-switch time. |
37 // Use for state-transition points (into _thread_blocked) or when |
37 // Use for state-transition points (into _thread_blocked) or when |
38 // parking. |
38 // parking. |
39 |
39 |
40 .inline _mark_fpu_nosave, 0 |
40 .inline _mark_fpu_nosave, 0 |
41 .volatile |
41 .volatile |
42 wr %g0, 0, %fprs |
42 wr %g0, 0, %fprs |
43 .nonvolatile |
43 .nonvolatile |
44 .end |
44 .end |
45 |
45 |
46 // Support for jint Atomic::xchg(jint exchange_value, volatile jint* dest). |
46 // Support for jint Atomic::xchg(jint exchange_value, volatile jint* dest). |
47 // |
47 // |
83 .nonvolatile |
83 .nonvolatile |
84 .end |
84 .end |
85 |
85 |
86 |
86 |
87 // Support for jint Atomic::cmpxchg(jint exchange_value, |
87 // Support for jint Atomic::cmpxchg(jint exchange_value, |
88 // volatile jint* dest, |
88 // volatile jint* dest, |
89 // jint compare_value) |
89 // jint compare_value) |
90 // |
90 // |
91 // Arguments: |
91 // Arguments: |
92 // exchange_value: O0 |
92 // exchange_value: O0 |
93 // dest: O1 |
93 // dest: O1 |
101 cas [%o1], %o2, %o0 |
101 cas [%o1], %o2, %o0 |
102 .nonvolatile |
102 .nonvolatile |
103 .end |
103 .end |
104 |
104 |
105 |
105 |
106 // Support for intptr_t Atomic::cmpxchg_ptr(intptr_t exchange_value, |
106 // Support for intptr_t Atomic::cmpxchg_ptr(intptr_t exchange_value, |
107 // volatile intptr_t* dest, |
107 // volatile intptr_t* dest, |
108 // intptr_t compare_value) |
108 // intptr_t compare_value) |
109 // |
109 // |
110 // 64-bit |
110 // 64-bit |
111 // |
111 // |
112 // Arguments: |
112 // Arguments: |
122 casx [%o1], %o2, %o0 |
122 casx [%o1], %o2, %o0 |
123 .nonvolatile |
123 .nonvolatile |
124 .end |
124 .end |
125 |
125 |
126 |
126 |
127 // Support for jlong Atomic::cmpxchg(jlong exchange_value, |
127 // Support for jlong Atomic::cmpxchg(jlong exchange_value, |
128 // volatile jlong* dest, |
128 // volatile jlong* dest, |
129 // jlong compare_value) |
129 // jlong compare_value) |
130 // |
130 // |
131 // 32-bit calling conventions |
131 // 32-bit calling conventions |
132 // |
132 // |
133 // Arguments: |
133 // Arguments: |
215 casx [%o1], %o2, %o3 |
215 casx [%o1], %o2, %o3 |
216 cmp %o2, %o3 |
216 cmp %o2, %o3 |
217 bne %xcc, 3b |
217 bne %xcc, 3b |
218 nop |
218 nop |
219 add %o0, %o2, %o0 |
219 add %o0, %o2, %o0 |
220 .nonvolatile |
|
221 .end |
|
222 |
|
223 |
|
224 // Support for void OrderAccess::acquire() |
|
225 // The method is intentionally empty. |
|
226 // It exists for the sole purpose of generating |
|
227 // a C/C++ sequence point over which the compiler won't |
|
228 // reorder code. |
|
229 |
|
230 .inline _OrderAccess_acquire,0 |
|
231 .volatile |
|
232 .nonvolatile |
|
233 .end |
|
234 |
|
235 |
|
236 // Support for void OrderAccess::fence() |
|
237 |
|
238 .inline _OrderAccess_fence,0 |
|
239 .volatile |
|
240 membar #StoreLoad |
|
241 .nonvolatile |
220 .nonvolatile |
242 .end |
221 .end |
243 |
222 |
244 |
223 |
245 // Support for void Prefetch::read(void *loc, intx interval) |
224 // Support for void Prefetch::read(void *loc, intx interval) |