1 /*

     2  * Copyright (c) 2013, 2018, Oracle and/or its affiliates. All rights reserved.

     3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.

     4  *

     5  * This code is free software; you can redistribute it and/or modify it

     6  * under the terms of the GNU General Public License version 2 only, as

     7  * published by the Free Software Foundation.

     8  *

     9  * This code is distributed in the hope that it will be useful, but WITHOUT

    10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

    11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

    12  * version 2 for more details (a copy is included in the LICENSE file that

    13  * accompanied this code).

    14  *

    15  * You should have received a copy of the GNU General Public License version

    16  * 2 along with this work; if not, write to the Free Software Foundation,

    17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

    18  *

    19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA

    20  * or visit www.oracle.com if you need additional information or have any

    21  * questions.

    22  */

    23 package org.graalvm.compiler.lir.amd64.vector;

    24 

    25 import jdk.vm.ci.meta.AllocatableValue;

    26 import org.graalvm.compiler.asm.amd64.AMD64Address;

    27 import org.graalvm.compiler.asm.amd64.AMD64VectorAssembler;

    28 import org.graalvm.compiler.asm.amd64.AVXKind;

    29 import org.graalvm.compiler.lir.LIRFrameState;

    30 import org.graalvm.compiler.lir.LIRInstructionClass;

    31 import org.graalvm.compiler.lir.Opcode;

    32 import org.graalvm.compiler.lir.amd64.AMD64AddressValue;

    33 import org.graalvm.compiler.lir.asm.CompilationResultBuilder;

    34 

    35 import static jdk.vm.ci.code.ValueUtil.asRegister;

    36 import static jdk.vm.ci.code.ValueUtil.isRegister;

    37 import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.COMPOSITE;

    38 import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.REG;

    39 import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.STACK;

    40 

    41 public class AMD64VectorBinary {

    42 

    43     public static final class AVXBinaryOp extends AMD64VectorLIRInstruction {

    44         public static final LIRInstructionClass<AVXBinaryOp> TYPE = LIRInstructionClass.create(AVXBinaryOp.class);

    45 

    46         @Opcode private final AMD64VectorAssembler.VexRVMOp opcode;

    47         private final AVXKind.AVXSize size;

    48 

    49         @Def({REG}) protected AllocatableValue result;

    50         @Use({REG}) protected AllocatableValue x;

    51         @Use({REG, STACK}) protected AllocatableValue y;

    52 

    53         public AVXBinaryOp(AMD64VectorAssembler.VexRVMOp opcode, AVXKind.AVXSize size, AllocatableValue result, AllocatableValue x, AllocatableValue y) {

    54             super(TYPE);

    55             this.opcode = opcode;

    56             this.size = size;

    57             this.result = result;

    58             this.x = x;

    59             this.y = y;

    60         }

    61 

    62         @Override

    63         public void emitCode(CompilationResultBuilder crb, AMD64VectorAssembler vasm) {

    64             if (isRegister(y)) {

    65                 opcode.emit(vasm, size, asRegister(result), asRegister(x), asRegister(y));

    66             } else {

    67                 opcode.emit(vasm, size, asRegister(result), asRegister(x), (AMD64Address) crb.asAddress(y));

    68             }

    69         }

    70     }

    71 

    72     public static final class AVXBinaryConstOp extends AMD64VectorLIRInstruction {

    73 

    74         public static final LIRInstructionClass<AVXBinaryConstOp> TYPE = LIRInstructionClass.create(AVXBinaryConstOp.class);

    75 

    76         @Opcode private final AMD64VectorAssembler.VexRRIOp opcode;

    77         private final AVXKind.AVXSize size;

    78 

    79         @Def({REG}) protected AllocatableValue result;

    80         @Use({REG}) protected AllocatableValue x;

    81         protected int y;

    82 

    83         public AVXBinaryConstOp(AMD64VectorAssembler.VexRRIOp opcode, AVXKind.AVXSize size, AllocatableValue result, AllocatableValue x, int y) {

    84             super(TYPE);

    85             assert (y & 0xFF) == y;

    86             this.opcode = opcode;

    87             this.size = size;

    88             this.result = result;

    89             this.x = x;

    90             this.y = y;

    91         }

    92 

    93         @Override

    94         public void emitCode(CompilationResultBuilder crb, AMD64VectorAssembler vasm) {

    95             opcode.emit(vasm, size, asRegister(result), asRegister(x), y);

    96         }

    97     }

    98 

    99     public static final class AVXBinaryMemoryOp extends AMD64VectorLIRInstruction {

   100         public static final LIRInstructionClass<AVXBinaryMemoryOp> TYPE = LIRInstructionClass.create(AVXBinaryMemoryOp.class);

   101 

   102         @Opcode private final AMD64VectorAssembler.VexRVMOp opcode;

   103         private final AVXKind.AVXSize size;

   104 

   105         @Def({REG}) protected AllocatableValue result;

   106         @Use({REG}) protected AllocatableValue x;

   107         @Use({COMPOSITE}) protected AMD64AddressValue y;

   108         @State protected LIRFrameState state;

   109 

   110         public AVXBinaryMemoryOp(AMD64VectorAssembler.VexRVMOp opcode, AVXKind.AVXSize size, AllocatableValue result, AllocatableValue x, AMD64AddressValue y, LIRFrameState state) {

   111             super(TYPE);

   112             this.opcode = opcode;

   113             this.size = size;

   114             this.result = result;

   115             this.x = x;

   116             this.y = y;

   117             this.state = state;

   118         }

   119 

   120         @Override

   121         public void emitCode(CompilationResultBuilder crb, AMD64VectorAssembler vasm) {

   122             if (state != null) {

   123                 crb.recordImplicitException(vasm.position(), state);

   124             }

   125             opcode.emit(vasm, size, asRegister(result), asRegister(x), y.toAddress());

   126         }

   127     }

   128 }