97 assert(type == T_INT || type == T_OBJECT || type == T_ARRAY LP64_ONLY( || type == T_LONG ), "unexpected type"); |
97 assert(type == T_INT || type == T_OBJECT || type == T_ARRAY LP64_ONLY( || type == T_LONG ), "unexpected type"); |
98 LIR_Opr tmp = gen->new_register(T_INT); |
98 LIR_Opr tmp = gen->new_register(T_INT); |
99 __ xchg(access.resolved_addr(), value_opr, result, tmp); |
99 __ xchg(access.resolved_addr(), value_opr, result, tmp); |
100 |
100 |
101 if (access.is_oop()) { |
101 if (access.is_oop()) { |
102 result = load_reference_barrier(access.gen(), result); |
102 result = load_reference_barrier(access.gen(), result, LIR_OprFact::addressConst(0)); |
103 LIR_Opr tmp = gen->new_register(type); |
103 LIR_Opr tmp = gen->new_register(type); |
104 __ move(result, tmp); |
104 __ move(result, tmp); |
105 result = tmp; |
105 result = tmp; |
106 if (ShenandoahSATBBarrier) { |
106 if (ShenandoahSATBBarrier) { |
107 pre_barrier(access.gen(), access.access_emit_info(), access.decorators(), LIR_OprFact::illegalOpr, |
107 pre_barrier(access.gen(), access.access_emit_info(), access.decorators(), LIR_OprFact::illegalOpr, |