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107 void verify_new_nodes_only(Node* root); |
107 void verify_new_nodes_only(Node* root); |
108 |
108 |
109 Node* _mem_node; // Ideal memory node consumed by mach node |
109 Node* _mem_node; // Ideal memory node consumed by mach node |
110 #endif |
110 #endif |
111 |
111 |
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112 // Mach node for ConP #NULL |
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113 MachNode* _mach_null; |
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114 |
112 public: |
115 public: |
113 int LabelRootDepth; |
116 int LabelRootDepth; |
114 static const int base2reg[]; // Map Types to machine register types |
117 static const int base2reg[]; // Map Types to machine register types |
115 // Convert ideal machine register to a register mask for spill-loads |
118 // Convert ideal machine register to a register mask for spill-loads |
116 static const RegMask *idealreg2regmask[]; |
119 static const RegMask *idealreg2regmask[]; |
119 void init_spill_mask( Node *ret ); |
122 void init_spill_mask( Node *ret ); |
120 // Convert machine register number to register mask |
123 // Convert machine register number to register mask |
121 static uint mreg2regmask_max; |
124 static uint mreg2regmask_max; |
122 static RegMask mreg2regmask[]; |
125 static RegMask mreg2regmask[]; |
123 static RegMask STACK_ONLY_mask; |
126 static RegMask STACK_ONLY_mask; |
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127 |
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128 MachNode* mach_null() const { return _mach_null; } |
124 |
129 |
125 bool is_shared( Node *n ) { return _shared.test(n->_idx) != 0; } |
130 bool is_shared( Node *n ) { return _shared.test(n->_idx) != 0; } |
126 void set_shared( Node *n ) { _shared.set(n->_idx); } |
131 void set_shared( Node *n ) { _shared.set(n->_idx); } |
127 bool is_visited( Node *n ) { return _visited.test(n->_idx) != 0; } |
132 bool is_visited( Node *n ) { return _visited.test(n->_idx) != 0; } |
128 void set_visited( Node *n ) { _visited.set(n->_idx); } |
133 void set_visited( Node *n ) { _visited.set(n->_idx); } |