src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.lir.amd64/src/org/graalvm/compiler/lir/amd64/AMD64StringLatin1InflateOp.java
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29 import static jdk.vm.ci.amd64.AMD64.rdi; |
29 import static jdk.vm.ci.amd64.AMD64.rdi; |
30 import static jdk.vm.ci.amd64.AMD64.rdx; |
30 import static jdk.vm.ci.amd64.AMD64.rdx; |
31 import static jdk.vm.ci.amd64.AMD64.rsi; |
31 import static jdk.vm.ci.amd64.AMD64.rsi; |
32 import static jdk.vm.ci.code.ValueUtil.asRegister; |
32 import static jdk.vm.ci.code.ValueUtil.asRegister; |
33 import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.REG; |
33 import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.REG; |
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34 |
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35 import java.util.EnumSet; |
34 |
36 |
35 import org.graalvm.compiler.asm.Label; |
37 import org.graalvm.compiler.asm.Label; |
36 import org.graalvm.compiler.asm.amd64.AMD64Address; |
38 import org.graalvm.compiler.asm.amd64.AMD64Address; |
37 import org.graalvm.compiler.asm.amd64.AMD64Assembler; |
39 import org.graalvm.compiler.asm.amd64.AMD64Assembler; |
38 import org.graalvm.compiler.asm.amd64.AMD64MacroAssembler; |
40 import org.graalvm.compiler.asm.amd64.AMD64MacroAssembler; |
41 import org.graalvm.compiler.lir.Opcode; |
43 import org.graalvm.compiler.lir.Opcode; |
42 import org.graalvm.compiler.lir.asm.CompilationResultBuilder; |
44 import org.graalvm.compiler.lir.asm.CompilationResultBuilder; |
43 import org.graalvm.compiler.lir.gen.LIRGeneratorTool; |
45 import org.graalvm.compiler.lir.gen.LIRGeneratorTool; |
44 |
46 |
45 import jdk.vm.ci.amd64.AMD64; |
47 import jdk.vm.ci.amd64.AMD64; |
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48 import jdk.vm.ci.amd64.AMD64.CPUFeature; |
46 import jdk.vm.ci.amd64.AMD64Kind; |
49 import jdk.vm.ci.amd64.AMD64Kind; |
47 import jdk.vm.ci.code.Register; |
50 import jdk.vm.ci.code.Register; |
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51 import jdk.vm.ci.code.TargetDescription; |
48 import jdk.vm.ci.meta.Value; |
52 import jdk.vm.ci.meta.Value; |
49 |
53 |
50 @Opcode("AMD64_STRING_INFLATE") |
54 @Opcode("AMD64_STRING_INFLATE") |
51 public final class AMD64StringLatin1InflateOp extends AMD64LIRInstruction { |
55 public final class AMD64StringLatin1InflateOp extends AMD64LIRInstruction { |
52 public static final LIRInstructionClass<AMD64StringLatin1InflateOp> TYPE = LIRInstructionClass.create(AMD64StringLatin1InflateOp.class); |
56 public static final LIRInstructionClass<AMD64StringLatin1InflateOp> TYPE = LIRInstructionClass.create(AMD64StringLatin1InflateOp.class); |
71 |
75 |
72 rsrcTemp = rsrc = src; |
76 rsrcTemp = rsrc = src; |
73 rdstTemp = rdst = dst; |
77 rdstTemp = rdst = dst; |
74 rlenTemp = rlen = len; |
78 rlenTemp = rlen = len; |
75 |
79 |
76 vtmp1 = tool.newVariable(LIRKind.value(AMD64Kind.V512_BYTE)); |
80 vtmp1 = useAVX512ForStringInflateCompress(tool.target()) ? tool.newVariable(LIRKind.value(AMD64Kind.V512_BYTE)) : tool.newVariable(LIRKind.value(AMD64Kind.V128_BYTE)); |
77 rtmp2 = tool.newVariable(LIRKind.value(AMD64Kind.DWORD)); |
81 rtmp2 = tool.newVariable(LIRKind.value(AMD64Kind.DWORD)); |
78 } |
82 } |
79 |
83 |
80 @Override |
84 @Override |
81 public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) { |
85 public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) { |
85 |
89 |
86 Register tmp1 = asRegister(vtmp1); |
90 Register tmp1 = asRegister(vtmp1); |
87 Register tmp2 = asRegister(rtmp2); |
91 Register tmp2 = asRegister(rtmp2); |
88 |
92 |
89 byteArrayInflate(masm, src, dst, len, tmp1, tmp2); |
93 byteArrayInflate(masm, src, dst, len, tmp1, tmp2); |
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94 } |
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95 |
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96 public static boolean useAVX512ForStringInflateCompress(TargetDescription target) { |
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97 EnumSet<CPUFeature> features = ((AMD64) target.arch).getFeatures(); |
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98 return features.contains(AMD64.CPUFeature.AVX512BW) && |
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99 features.contains(AMD64.CPUFeature.AVX512VL) && |
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100 features.contains(AMD64.CPUFeature.BMI2); |
90 } |
101 } |
91 |
102 |
92 /** |
103 /** |
93 * Inflate a Latin1 string using a byte[] array representation into a UTF16 string using a |
104 * Inflate a Latin1 string using a byte[] array representation into a UTF16 string using a |
94 * char[] array representation. |
105 * char[] array representation. |
108 |
119 |
109 assert src.number != dst.number && src.number != len.number && src.number != tmp.number; |
120 assert src.number != dst.number && src.number != len.number && src.number != tmp.number; |
110 assert dst.number != len.number && dst.number != tmp.number; |
121 assert dst.number != len.number && dst.number != tmp.number; |
111 assert len.number != tmp.number; |
122 assert len.number != tmp.number; |
112 |
123 |
113 if (masm.supports(AMD64.CPUFeature.AVX512BW) && |
124 if (useAVX512ForStringInflateCompress(masm.target)) { |
114 masm.supports(AMD64.CPUFeature.AVX512VL) && |
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115 masm.supports(AMD64.CPUFeature.BMI2)) { |
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116 |
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117 // If the length of the string is less than 16, we chose not to use the |
125 // If the length of the string is less than 16, we chose not to use the |
118 // AVX512 instructions. |
126 // AVX512 instructions. |
119 masm.testl(len, -16); |
127 masm.testl(len, -16); |
120 masm.jcc(AMD64Assembler.ConditionFlag.Zero, labelBelowThreshold); |
128 masm.jcc(AMD64Assembler.ConditionFlag.Zero, labelBelowThreshold); |
121 |
129 |