jdk-sandbox: comparison hotspot/src/share/vm/opto/matcher.cpp

equal deleted inserted replaced

-:803947e176bd
+:9f4474e5dbaf
 Matcher::Matcher( Node_List &proj_list ) :
 PhaseTransform( Phase::Ins_Select ),
 #ifdef ASSERT
 _old2new_map(C->comp_arena()),
 #endif
-_shared_constants(C->comp_arena()),
+_shared_nodes(C->comp_arena()),
 _reduceOp(reduceOp), _leftOp(leftOp), _rightOp(rightOp),
 _swallowed(swallowed),
 _begin_inst_chain_rule(_BEGIN_INST_CHAIN_RULE),
 _end_inst_chain_rule(_END_INST_CHAIN_RULE),
 _must_clone(must_clone), _proj_list(proj_list),
 // Add any Matcher-ignored edges
 uint cnt = n->req();
 uint start = 1;
 if( mem != (Node*)1 ) start = MemNode::Memory+1;
-if( n->Opcode() == Op_AddP ) {
+if( n->is_AddP() ) {
 assert( mem == (Node*)1, "" );
 start = AddPNode::Base+1;
 }
 for( i = start; i < cnt; i++ ) {
 if( !n->match_edge(i) ) {
 const Type *t = m->bottom_type();
 if( t->singleton() ) {
 // Never force constants into registers.  Allow them to match as
 // constants or registers.  Copies of the same value will share
-// the same register.  See find_shared_constant.
+// the same register.  See find_shared_node.
 return false;
 } else {                      // Not a constant
 // Stop recursion if they have different Controls.
 // Slot 0 of constants is not really a Control.
 if( control && m->in(0) && control != m->in(0) ) {
 break;                // m->in(0)?  If so, we can use it
 }
 if( j == max_scan )       // No post-domination before scan end?
 return true;            // Then break the match tree up
 }
+if (m->is_DecodeN() && Matcher::clone_shift_expressions) {
-if (m->Opcode() == Op_DecodeN && m->outcnt() == 2) {
 // These are commonly used in address expressions and can
-// efficiently fold into them in some cases but because they are
+// efficiently fold into them on X64 in some cases.
-// consumed by AddP they commonly have two users.
+return false;
-if (m->raw_out(0) == m->raw_out(1) && m->raw_out(0)->Opcode() == Op_AddP) return false;
 }
 }
 // Not forceably cloning.  If shared, put it into a register.
 return shared;
 // Con nodes reduced using the same rule can share their MachNode
 // which reduces the number of copies of a constant in the final
 // program.  The register allocator is free to split uses later to
 // split live ranges.
-MachNode* Matcher::find_shared_constant(Node* leaf, uint rule) {
+MachNode* Matcher::find_shared_node(Node* leaf, uint rule) {
-if (!leaf->is_Con()) return NULL;
+if (!leaf->is_Con() && !leaf->is_DecodeN()) return NULL;
 // See if this Con has already been reduced using this rule.
-if (_shared_constants.Size() <= leaf->_idx) return NULL;
+if (_shared_nodes.Size() <= leaf->_idx) return NULL;
-MachNode* last = (MachNode*)_shared_constants.at(leaf->_idx);
+MachNode* last = (MachNode*)_shared_nodes.at(leaf->_idx);
 if (last != NULL && rule == last->rule()) {
+// Don't expect control change for DecodeN
+if (leaf->is_DecodeN())
+return last;
 // Get the new space root.
 Node* xroot = new_node(C->root());
 if (xroot == NULL) {
 // This shouldn't happen give the order of matching.
 return NULL;
 //     Build the operand, place it inside the instruction
 //     Call ReduceOper.
 MachNode *Matcher::ReduceInst( State *s, int rule, Node *&mem ) {
 assert( rule >= NUM_OPERANDS, "called with operand rule" );
-MachNode* shared_con = find_shared_constant(s->_leaf, rule);
+MachNode* shared_node = find_shared_node(s->_leaf, rule);
-if (shared_con != NULL) {
+if (shared_node != NULL) {
-return shared_con;
+return shared_node;
 }
 // Build the object to represent this state & prepare for recursive calls
 MachNode *mach = s->MachNodeGenerator( rule, C );
 mach->_opnds[0] = s->MachOperGenerator( _reduceOp[rule], C );
 // If a Memory was used, insert a Memory edge
 if( mem != (Node*)1 )
 mach->ins_req(MemNode::Memory,mem);
 // If the _leaf is an AddP, insert the base edge
-if( leaf->Opcode() == Op_AddP )
+if( leaf->is_AddP() )
 mach->ins_req(AddPNode::Base,leaf->in(AddPNode::Base));
 uint num_proj = _proj_list.size();
 // Perform any 1-to-many expansions required
 if (_allocation_started) {
 guarantee(ex == mach, "no expand rules during spill generation");
 guarantee(_proj_list.size() == num_proj, "no allocation during spill generation");
 }
-if (leaf->is_Con()) {
+if (leaf->is_Con() || leaf->is_DecodeN()) {
 // Record the con for sharing
-_shared_constants.map(leaf->_idx, ex);
+_shared_nodes.map(leaf->_idx, ex);
 }
 return ex;
 }
 if( off->is_Con() ) {
 set_visited(m);  // Flag as visited now
 Node *adr = m->in(AddPNode::Address);
 // Intel, ARM and friends can handle 2 adds in addressing mode
-if( clone_shift_expressions && adr->Opcode() == Op_AddP &&
+if( clone_shift_expressions && adr->is_AddP() &&
 // AtomicAdd is not an addressing expression.
 // Cheap to find it by looking for screwy base.
 !adr->in(AddPNode::Base)->is_top() ) {
 set_visited(adr);  // Flag as visited now
 Node *shift = adr->in(AddPNode::Offset);

changeset 594	9f4474e5dbaf
parent 590	2954744d7bba
child 595	a2be4c89de81