2057 |
2059 |
2058 LIR_Opr reg = rlock_result(x, x->basic_type()); |
2060 LIR_Opr reg = rlock_result(x, x->basic_type()); |
2059 |
2061 |
2060 int log2_scale = 0; |
2062 int log2_scale = 0; |
2061 if (x->has_index()) { |
2063 if (x->has_index()) { |
2062 assert(x->index()->type()->tag() == intTag, "should not find non-int index"); |
|
2063 log2_scale = x->log2_scale(); |
2064 log2_scale = x->log2_scale(); |
2064 } |
2065 } |
2065 |
2066 |
2066 assert(!x->has_index() || idx.value() == x->index(), "should match"); |
2067 assert(!x->has_index() || idx.value() == x->index(), "should match"); |
2067 |
2068 |
2068 LIR_Opr base_op = base.result(); |
2069 LIR_Opr base_op = base.result(); |
|
2070 LIR_Opr index_op = idx.result(); |
2069 #ifndef _LP64 |
2071 #ifndef _LP64 |
2070 if (x->base()->type()->tag() == longTag) { |
2072 if (x->base()->type()->tag() == longTag) { |
2071 base_op = new_register(T_INT); |
2073 base_op = new_register(T_INT); |
2072 __ convert(Bytecodes::_l2i, base.result(), base_op); |
2074 __ convert(Bytecodes::_l2i, base.result(), base_op); |
2073 } else { |
2075 } |
2074 assert(x->base()->type()->tag() == intTag, "must be"); |
2076 if (x->has_index()) { |
2075 } |
2077 if (x->index()->type()->tag() == longTag) { |
|
2078 LIR_Opr long_index_op = index_op; |
|
2079 if (x->index()->type()->is_constant()) { |
|
2080 long_index_op = new_register(T_LONG); |
|
2081 __ move(index_op, long_index_op); |
|
2082 } |
|
2083 index_op = new_register(T_INT); |
|
2084 __ convert(Bytecodes::_l2i, long_index_op, index_op); |
|
2085 } else { |
|
2086 assert(x->index()->type()->tag() == intTag, "must be"); |
|
2087 } |
|
2088 } |
|
2089 // At this point base and index should be all ints. |
|
2090 assert(base_op->type() == T_INT && !base_op->is_constant(), "base should be an non-constant int"); |
|
2091 assert(!x->has_index() || index_op->type() == T_INT, "index should be an int"); |
|
2092 #else |
|
2093 if (x->has_index()) { |
|
2094 if (x->index()->type()->tag() == intTag) { |
|
2095 if (!x->index()->type()->is_constant()) { |
|
2096 index_op = new_register(T_LONG); |
|
2097 __ convert(Bytecodes::_i2l, idx.result(), index_op); |
|
2098 } |
|
2099 } else { |
|
2100 assert(x->index()->type()->tag() == longTag, "must be"); |
|
2101 if (x->index()->type()->is_constant()) { |
|
2102 index_op = new_register(T_LONG); |
|
2103 __ move(idx.result(), index_op); |
|
2104 } |
|
2105 } |
|
2106 } |
|
2107 // At this point base is a long non-constant |
|
2108 // Index is a long register or a int constant. |
|
2109 // We allow the constant to stay an int because that would allow us a more compact encoding by |
|
2110 // embedding an immediate offset in the address expression. If we have a long constant, we have to |
|
2111 // move it into a register first. |
|
2112 assert(base_op->type() == T_LONG && !base_op->is_constant(), "base must be a long non-constant"); |
|
2113 assert(!x->has_index() || (index_op->type() == T_INT && index_op->is_constant()) || |
|
2114 (index_op->type() == T_LONG && !index_op->is_constant()), "unexpected index type"); |
2076 #endif |
2115 #endif |
2077 |
2116 |
2078 BasicType dst_type = x->basic_type(); |
2117 BasicType dst_type = x->basic_type(); |
2079 LIR_Opr index_op = idx.result(); |
|
2080 |
2118 |
2081 LIR_Address* addr; |
2119 LIR_Address* addr; |
2082 if (index_op->is_constant()) { |
2120 if (index_op->is_constant()) { |
2083 assert(log2_scale == 0, "must not have a scale"); |
2121 assert(log2_scale == 0, "must not have a scale"); |
|
2122 assert(index_op->type() == T_INT, "only int constants supported"); |
2084 addr = new LIR_Address(base_op, index_op->as_jint(), dst_type); |
2123 addr = new LIR_Address(base_op, index_op->as_jint(), dst_type); |
2085 } else { |
2124 } else { |
2086 #ifdef X86 |
2125 #ifdef X86 |
2087 #ifdef _LP64 |
|
2088 if (!index_op->is_illegal() && index_op->type() == T_INT) { |
|
2089 LIR_Opr tmp = new_pointer_register(); |
|
2090 __ convert(Bytecodes::_i2l, index_op, tmp); |
|
2091 index_op = tmp; |
|
2092 } |
|
2093 #endif |
|
2094 addr = new LIR_Address(base_op, index_op, LIR_Address::Scale(log2_scale), 0, dst_type); |
2126 addr = new LIR_Address(base_op, index_op, LIR_Address::Scale(log2_scale), 0, dst_type); |
2095 #elif defined(ARM) |
2127 #elif defined(ARM) |
2096 addr = generate_address(base_op, index_op, log2_scale, 0, dst_type); |
2128 addr = generate_address(base_op, index_op, log2_scale, 0, dst_type); |
2097 #else |
2129 #else |
2098 if (index_op->is_illegal() || log2_scale == 0) { |
2130 if (index_op->is_illegal() || log2_scale == 0) { |
2099 #ifdef _LP64 |
|
2100 if (!index_op->is_illegal() && index_op->type() == T_INT) { |
|
2101 LIR_Opr tmp = new_pointer_register(); |
|
2102 __ convert(Bytecodes::_i2l, index_op, tmp); |
|
2103 index_op = tmp; |
|
2104 } |
|
2105 #endif |
|
2106 addr = new LIR_Address(base_op, index_op, dst_type); |
2131 addr = new LIR_Address(base_op, index_op, dst_type); |
2107 } else { |
2132 } else { |
2108 LIR_Opr tmp = new_pointer_register(); |
2133 LIR_Opr tmp = new_pointer_register(); |
2109 __ shift_left(index_op, log2_scale, tmp); |
2134 __ shift_left(index_op, log2_scale, tmp); |
2110 addr = new LIR_Address(base_op, tmp, dst_type); |
2135 addr = new LIR_Address(base_op, tmp, dst_type); |
2150 } |
2174 } |
2151 |
2175 |
2152 set_no_result(x); |
2176 set_no_result(x); |
2153 |
2177 |
2154 LIR_Opr base_op = base.result(); |
2178 LIR_Opr base_op = base.result(); |
|
2179 LIR_Opr index_op = idx.result(); |
|
2180 |
2155 #ifndef _LP64 |
2181 #ifndef _LP64 |
2156 if (x->base()->type()->tag() == longTag) { |
2182 if (x->base()->type()->tag() == longTag) { |
2157 base_op = new_register(T_INT); |
2183 base_op = new_register(T_INT); |
2158 __ convert(Bytecodes::_l2i, base.result(), base_op); |
2184 __ convert(Bytecodes::_l2i, base.result(), base_op); |
2159 } else { |
2185 } |
2160 assert(x->base()->type()->tag() == intTag, "must be"); |
2186 if (x->has_index()) { |
2161 } |
2187 if (x->index()->type()->tag() == longTag) { |
|
2188 index_op = new_register(T_INT); |
|
2189 __ convert(Bytecodes::_l2i, idx.result(), index_op); |
|
2190 } |
|
2191 } |
|
2192 // At this point base and index should be all ints and not constants |
|
2193 assert(base_op->type() == T_INT && !base_op->is_constant(), "base should be an non-constant int"); |
|
2194 assert(!x->has_index() || (index_op->type() == T_INT && !index_op->is_constant()), "index should be an non-constant int"); |
|
2195 #else |
|
2196 if (x->has_index()) { |
|
2197 if (x->index()->type()->tag() == intTag) { |
|
2198 index_op = new_register(T_LONG); |
|
2199 __ convert(Bytecodes::_i2l, idx.result(), index_op); |
|
2200 } |
|
2201 } |
|
2202 // At this point base and index are long and non-constant |
|
2203 assert(base_op->type() == T_LONG && !base_op->is_constant(), "base must be a non-constant long"); |
|
2204 assert(!x->has_index() || (index_op->type() == T_LONG && !index_op->is_constant()), "index must be a non-constant long"); |
2162 #endif |
2205 #endif |
2163 |
2206 |
2164 LIR_Opr index_op = idx.result(); |
|
2165 if (log2_scale != 0) { |
2207 if (log2_scale != 0) { |
2166 // temporary fix (platform dependent code without shift on Intel would be better) |
2208 // temporary fix (platform dependent code without shift on Intel would be better) |
2167 index_op = new_pointer_register(); |
2209 // TODO: ARM also allows embedded shift in the address |
2168 #ifdef _LP64 |
|
2169 if(idx.result()->type() == T_INT) { |
|
2170 __ convert(Bytecodes::_i2l, idx.result(), index_op); |
|
2171 } else { |
|
2172 #endif |
|
2173 // TODO: ARM also allows embedded shift in the address |
|
2174 __ move(idx.result(), index_op); |
|
2175 #ifdef _LP64 |
|
2176 } |
|
2177 #endif |
|
2178 __ shift_left(index_op, log2_scale, index_op); |
2210 __ shift_left(index_op, log2_scale, index_op); |
2179 } |
2211 } |
2180 #ifdef _LP64 |
|
2181 else if(!index_op->is_illegal() && index_op->type() == T_INT) { |
|
2182 LIR_Opr tmp = new_pointer_register(); |
|
2183 __ convert(Bytecodes::_i2l, index_op, tmp); |
|
2184 index_op = tmp; |
|
2185 } |
|
2186 #endif |
|
2187 |
2212 |
2188 LIR_Address* addr = new LIR_Address(base_op, index_op, x->basic_type()); |
2213 LIR_Address* addr = new LIR_Address(base_op, index_op, x->basic_type()); |
2189 __ move(value.result(), addr); |
2214 __ move(value.result(), addr); |
2190 } |
2215 } |
2191 |
2216 |