jdk-sandbox: comparison src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.core.amd64/src/org/graalvm/compiler/core/amd64/AMD64NodeMatchRules.java

equal deleted inserted replaced

-:13588c901957
+:9cf78a70fa4f
 /*
-* Copyright (c) 2009, 2018, Oracle and/or its affiliates. All rights reserved.
+* Copyright (c) 2009, 2019, Oracle and/or its affiliates. All rights reserved.
 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 *
 * This code is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License version 2 only, as
 * published by the Free Software Foundation.
 import static org.graalvm.compiler.asm.amd64.AMD64Assembler.AMD64BinaryArithmetic.SUB;
 import static org.graalvm.compiler.asm.amd64.AMD64Assembler.AMD64BinaryArithmetic.XOR;
 import static org.graalvm.compiler.asm.amd64.AMD64Assembler.AMD64RMOp.MOVSX;
 import static org.graalvm.compiler.asm.amd64.AMD64Assembler.AMD64RMOp.MOVSXB;
 import static org.graalvm.compiler.asm.amd64.AMD64Assembler.AMD64RMOp.MOVSXD;
+import static org.graalvm.compiler.asm.amd64.AMD64Assembler.VexRVMOp.VADDSD;
+import static org.graalvm.compiler.asm.amd64.AMD64Assembler.VexRVMOp.VADDSS;
+import static org.graalvm.compiler.asm.amd64.AMD64Assembler.VexRVMOp.VMULSD;
+import static org.graalvm.compiler.asm.amd64.AMD64Assembler.VexRVMOp.VMULSS;
+import static org.graalvm.compiler.asm.amd64.AMD64Assembler.VexRVMOp.VSUBSD;
+import static org.graalvm.compiler.asm.amd64.AMD64Assembler.VexRVMOp.VSUBSS;
 import static org.graalvm.compiler.asm.amd64.AMD64BaseAssembler.OperandSize.DWORD;
 import static org.graalvm.compiler.asm.amd64.AMD64BaseAssembler.OperandSize.QWORD;
 import static org.graalvm.compiler.asm.amd64.AMD64BaseAssembler.OperandSize.SD;
 import static org.graalvm.compiler.asm.amd64.AMD64BaseAssembler.OperandSize.SS;
+import org.graalvm.compiler.asm.amd64.AMD64Assembler;
 import org.graalvm.compiler.asm.amd64.AMD64Assembler.AMD64MIOp;
 import org.graalvm.compiler.asm.amd64.AMD64Assembler.AMD64RMOp;
 import org.graalvm.compiler.asm.amd64.AMD64Assembler.SSEOp;
 import org.graalvm.compiler.asm.amd64.AMD64BaseAssembler.OperandSize;
 import org.graalvm.compiler.core.common.LIRKind;
 @MatchRule("(If (PointerEquals=compare value ValueCompareAndSwap=cas))")
 @MatchRule("(If (FloatEquals=compare value ValueCompareAndSwap=cas))")
 @MatchRule("(If (IntegerEquals=compare value ValueCompareAndSwap=cas))")
 public ComplexMatchResult ifCompareValueCas(IfNode root, CompareNode compare, ValueNode value, ValueCompareAndSwapNode cas) {
 assert compare.condition() == CanonicalCondition.EQ;
-if (value == cas.getExpectedValue() && cas.usages().count() == 1) {
+if (value == cas.getExpectedValue() && cas.hasExactlyOneUsage()) {
 return builder -> {
 LIRKind kind = getLirKind(cas);
 LabelRef trueLabel = getLIRBlock(root.trueSuccessor());
 LabelRef falseLabel = getLIRBlock(root.falseSuccessor());
 double trueLabelProbability = root.probability(root.trueSuccessor());
 @MatchRule("(If (FloatEquals=compare value LogicCompareAndSwap=cas))")
 @MatchRule("(If (IntegerEquals=compare value LogicCompareAndSwap=cas))")
 public ComplexMatchResult ifCompareLogicCas(IfNode root, CompareNode compare, ValueNode value, LogicCompareAndSwapNode cas) {
 JavaConstant constant = value.asJavaConstant();
 assert compare.condition() == CanonicalCondition.EQ;
-if (constant != null && cas.usages().count() == 1) {
+if (constant != null && cas.hasExactlyOneUsage()) {
 long constantValue = constant.asLong();
 boolean successIsTrue;
 if (constantValue == 0) {
 successIsTrue = false;
 } else if (constantValue == 1) {
 private ComplexMatchResult binaryRead(AMD64RMOp op, OperandSize size, ValueNode value, LIRLowerableAccess access) {
 return builder -> getArithmeticLIRGenerator().emitBinaryMemory(op, size, getLIRGeneratorTool().asAllocatable(operand(value)), (AMD64AddressValue) operand(access.getAddress()),
 getState(access));
 }
+private ComplexMatchResult binaryRead(AMD64Assembler.VexRVMOp op, OperandSize size, ValueNode value, LIRLowerableAccess access) {
+assert size == SS || size == SD;
+return builder -> getArithmeticLIRGenerator().emitBinaryMemory(op, size, getLIRGeneratorTool().asAllocatable(operand(value)), (AMD64AddressValue) operand(access.getAddress()),
+getState(access));
+}
 @MatchRule("(Add value Read=access)")
 @MatchRule("(Add value FloatingRead=access)")
 public ComplexMatchResult addMemory(ValueNode value, LIRLowerableAccess access) {
 OperandSize size = getMemorySize(access);
 if (size.isXmmType()) {
-return binaryRead(SSEOp.ADD, size, value, access);
+if (getArithmeticLIRGenerator().supportAVX()) {
+return binaryRead(size == SS ? VADDSS : VADDSD, size, value, access);
+} else {
+return binaryRead(SSEOp.ADD, size, value, access);
+}
 } else {
 return binaryRead(ADD.getRMOpcode(size), size, value, access);
 }
 }
 @MatchRule("(Sub value Read=access)")
 @MatchRule("(Sub value FloatingRead=access)")
 public ComplexMatchResult subMemory(ValueNode value, LIRLowerableAccess access) {
 OperandSize size = getMemorySize(access);
 if (size.isXmmType()) {
-return binaryRead(SSEOp.SUB, size, value, access);
+if (getArithmeticLIRGenerator().supportAVX()) {
+return binaryRead(size == SS ? VSUBSS : VSUBSD, size, value, access);
+} else {
+return binaryRead(SSEOp.SUB, size, value, access);
+}
 } else {
 return binaryRead(SUB.getRMOpcode(size), size, value, access);
 }
 }
 @MatchRule("(Mul value Read=access)")
 @MatchRule("(Mul value FloatingRead=access)")
 public ComplexMatchResult mulMemory(ValueNode value, LIRLowerableAccess access) {
 OperandSize size = getMemorySize(access);
 if (size.isXmmType()) {
-return binaryRead(SSEOp.MUL, size, value, access);
+if (getArithmeticLIRGenerator().supportAVX()) {
+return binaryRead(size == SS ? VMULSS : VMULSD, size, value, access);
+} else {
+return binaryRead(SSEOp.MUL, size, value, access);
+}
 } else {
 return binaryRead(AMD64RMOp.IMUL, size, value, access);
 }
 }

branch	datagramsocketimpl-branch
changeset 58678	9cf78a70fa4f
parent 52910	583fd71c47d6
child 58679	9c3209ff7550