122 import org.graalvm.compiler.lir.amd64.AMD64MulDivOp; |
122 import org.graalvm.compiler.lir.amd64.AMD64MulDivOp; |
123 import org.graalvm.compiler.lir.amd64.AMD64ShiftOp; |
123 import org.graalvm.compiler.lir.amd64.AMD64ShiftOp; |
124 import org.graalvm.compiler.lir.amd64.AMD64SignExtendOp; |
124 import org.graalvm.compiler.lir.amd64.AMD64SignExtendOp; |
125 import org.graalvm.compiler.lir.amd64.AMD64Ternary; |
125 import org.graalvm.compiler.lir.amd64.AMD64Ternary; |
126 import org.graalvm.compiler.lir.amd64.AMD64Unary; |
126 import org.graalvm.compiler.lir.amd64.AMD64Unary; |
127 import org.graalvm.compiler.lir.amd64.AMD64ZeroMemoryOp; |
|
128 import org.graalvm.compiler.lir.amd64.vector.AMD64VectorBinary; |
127 import org.graalvm.compiler.lir.amd64.vector.AMD64VectorBinary; |
|
128 import org.graalvm.compiler.lir.amd64.vector.AMD64VectorBinary.AVXBinaryConstFloatOp; |
129 import org.graalvm.compiler.lir.amd64.vector.AMD64VectorBinary.AVXBinaryOp; |
129 import org.graalvm.compiler.lir.amd64.vector.AMD64VectorBinary.AVXBinaryOp; |
130 import org.graalvm.compiler.lir.amd64.vector.AMD64VectorUnary; |
130 import org.graalvm.compiler.lir.amd64.vector.AMD64VectorUnary; |
131 import org.graalvm.compiler.lir.gen.ArithmeticLIRGenerator; |
131 import org.graalvm.compiler.lir.gen.ArithmeticLIRGenerator; |
132 |
132 |
133 import jdk.vm.ci.amd64.AMD64; |
133 import jdk.vm.ci.amd64.AMD64; |
446 case QWORD: |
446 case QWORD: |
447 return emitMulHigh(AMD64MOp.MUL, QWORD, a, b); |
447 return emitMulHigh(AMD64MOp.MUL, QWORD, a, b); |
448 default: |
448 default: |
449 throw GraalError.shouldNotReachHere(); |
449 throw GraalError.shouldNotReachHere(); |
450 } |
450 } |
|
451 } |
|
452 |
|
453 public Value emitBinaryMemory(VexRVMOp op, OperandSize size, AllocatableValue a, AMD64AddressValue location, LIRFrameState state) { |
|
454 assert (size.isXmmType() && supportAVX()); |
|
455 Variable result = getLIRGen().newVariable(LIRKind.combine(a)); |
|
456 getLIRGen().append(new AMD64VectorBinary.AVXBinaryMemoryOp(op, getRegisterSize(result), result, a, location, state)); |
|
457 return result; |
451 } |
458 } |
452 |
459 |
453 public Value emitBinaryMemory(AMD64RMOp op, OperandSize size, AllocatableValue a, AMD64AddressValue location, LIRFrameState state) { |
460 public Value emitBinaryMemory(AMD64RMOp op, OperandSize size, AllocatableValue a, AMD64AddressValue location, LIRFrameState state) { |
454 Variable result = getLIRGen().newVariable(LIRKind.combine(a)); |
461 Variable result = getLIRGen().newVariable(LIRKind.combine(a)); |
455 getLIRGen().append(new AMD64Binary.MemoryTwoOp(op, size, result, a, location, state)); |
462 getLIRGen().append(new AMD64Binary.MemoryTwoOp(op, size, result, a, location, state)); |
1118 } |
1125 } |
1119 |
1126 |
1120 @Override |
1127 @Override |
1121 public Value emitMathPow(Value x, Value y) { |
1128 public Value emitMathPow(Value x, Value y) { |
1122 return new AMD64MathPowOp().emitLIRWrapper(getLIRGen(), x, y); |
1129 return new AMD64MathPowOp().emitLIRWrapper(getLIRGen(), x, y); |
1123 } |
|
1124 |
|
1125 @Override |
|
1126 public void emitZeroMemory(Value address, Value length) { |
|
1127 RegisterValue lengthReg = moveToReg(AMD64.rcx, length); |
|
1128 getLIRGen().append(new AMD64ZeroMemoryOp(getAMD64LIRGen().asAddressValue(address), lengthReg)); |
|
1129 } |
1130 } |
1130 |
1131 |
1131 protected AMD64LIRGenerator getAMD64LIRGen() { |
1132 protected AMD64LIRGenerator getAMD64LIRGen() { |
1132 return (AMD64LIRGenerator) getLIRGen(); |
1133 return (AMD64LIRGenerator) getLIRGen(); |
1133 } |
1134 } |
1337 getLIRGen().append(new AMD64Binary.RMIOp(AMD64RMIOp.ROUNDSD, OperandSize.PD, result, asAllocatable(value), mode.encoding)); |
1338 getLIRGen().append(new AMD64Binary.RMIOp(AMD64RMIOp.ROUNDSD, OperandSize.PD, result, asAllocatable(value), mode.encoding)); |
1338 } |
1339 } |
1339 return result; |
1340 return result; |
1340 } |
1341 } |
1341 |
1342 |
1342 private boolean supportAVX() { |
1343 public boolean supportAVX() { |
1343 TargetDescription target = getLIRGen().target(); |
1344 TargetDescription target = getLIRGen().target(); |
1344 return ((AMD64) target.arch).getFeatures().contains(CPUFeature.AVX); |
1345 return ((AMD64) target.arch).getFeatures().contains(CPUFeature.AVX); |
1345 } |
1346 } |
1346 |
1347 |
1347 private static AVXSize getRegisterSize(Value a) { |
1348 private static AVXSize getRegisterSize(Value a) { |
1351 } else { |
1352 } else { |
1352 return AVXSize.XMM; |
1353 return AVXSize.XMM; |
1353 } |
1354 } |
1354 } |
1355 } |
1355 |
1356 |
1356 private Variable emitBinary(LIRKind resultKind, VexRVMOp op, Value a, Value b) { |
1357 protected Variable emitBinary(LIRKind resultKind, VexRVMOp op, Value a, Value b) { |
1357 Variable result = getLIRGen().newVariable(resultKind); |
1358 Variable result = getLIRGen().newVariable(resultKind); |
1358 getLIRGen().append(new AVXBinaryOp(op, getRegisterSize(result), result, asAllocatable(a), asAllocatable(b))); |
1359 if (b instanceof ConstantValue && (b.getPlatformKind() == AMD64Kind.SINGLE || b.getPlatformKind() == AMD64Kind.DOUBLE)) { |
|
1360 getLIRGen().append(new AVXBinaryConstFloatOp(op, getRegisterSize(result), result, asAllocatable(a), (ConstantValue) b)); |
|
1361 } else { |
|
1362 getLIRGen().append(new AVXBinaryOp(op, getRegisterSize(result), result, asAllocatable(a), asAllocatable(b))); |
|
1363 } |
1359 return result; |
1364 return result; |
1360 } |
1365 } |
1361 |
1366 |
1362 } |
1367 } |