jdk-sandbox: comparison src/hotspot/share/opto/memnode.hpp

equal deleted inserted replaced

-:13588c901957
+:9cf78a70fa4f
 class MemNode : public Node {
 private:
 bool _unaligned_access; // Unaligned access from unsafe
 bool _mismatched_access; // Mismatched access from unsafe: byte read in integer array for instance
 bool _unsafe_access;     // Access of unsafe origin.
+uint8_t _barrier; // Bit field with barrier information
 protected:
 #ifdef ASSERT
 const TypePtr* _adr_type;     // What kind of memory is being addressed?
 #endif
 virtual uint size_of() const;
 release,       // Store has to release or be preceded by MemBarRelease.
 seqcst,        // LoadStore has to have both acquire and release semantics.
 unset          // The memory ordering is not set (used for testing)
 } MemOrd;
 protected:
-MemNode( Node *c0, Node *c1, Node *c2, const TypePtr* at )
+MemNode( Node *c0, Node *c1, Node *c2, const TypePtr* at ) :
-: Node(c0,c1,c2   ), _unaligned_access(false), _mismatched_access(false), _unsafe_access(false) {
+Node(c0,c1,c2),
+_unaligned_access(false),
+_mismatched_access(false),
+_unsafe_access(false),
+_barrier(0) {
 init_class_id(Class_Mem);
 debug_only(_adr_type=at; adr_type();)
 }
-MemNode( Node *c0, Node *c1, Node *c2, const TypePtr* at, Node *c3 )
+MemNode( Node *c0, Node *c1, Node *c2, const TypePtr* at, Node *c3 ) :
-: Node(c0,c1,c2,c3), _unaligned_access(false), _mismatched_access(false), _unsafe_access(false) {
+Node(c0,c1,c2,c3),
+_unaligned_access(false),
+_mismatched_access(false),
+_unsafe_access(false),
+_barrier(0) {
 init_class_id(Class_Mem);
 debug_only(_adr_type=at; adr_type();)
 }
-MemNode( Node *c0, Node *c1, Node *c2, const TypePtr* at, Node *c3, Node *c4)
+MemNode( Node *c0, Node *c1, Node *c2, const TypePtr* at, Node *c3, Node *c4) :
-: Node(c0,c1,c2,c3,c4), _unaligned_access(false), _mismatched_access(false), _unsafe_access(false) {
+Node(c0,c1,c2,c3,c4),
+_unaligned_access(false),
+_mismatched_access(false),
+_unsafe_access(false),
+_barrier(0) {
 init_class_id(Class_Mem);
 debug_only(_adr_type=at; adr_type();)
 }
 virtual Node* find_previous_arraycopy(PhaseTransform* phase, Node* ld_alloc, Node*& mem, bool can_see_stored_value) const { return NULL; }
 #else
 return type2aelembytes(memory_type());
 #endif
 }
+uint8_t barrier_data() { return _barrier; }
+void set_barrier_data(uint8_t barrier_data) { _barrier = barrier_data; }
 // Search through memory states which precede this node (load or store).
 // Look for an exact match for the address, with no intervening
 // aliased stores.
 Node* find_previous_store(PhaseTransform* phase);
 class LoadNode : public MemNode {
 public:
 // Some loads (from unsafe) should be pinned: they don't depend only
 // on the dominating test.  The field _control_dependency below records
 // whether that node depends only on the dominating test.
-// Methods used to build LoadNodes pass an argument of type enum
+// Pinned and UnknownControl are similar, but differ in that Pinned
-// ControlDependency instead of a boolean because those methods
+// loads are not allowed to float across safepoints, whereas UnknownControl
-// typically have multiple boolean parameters with default values:
+// loads are allowed to do that. Therefore, Pinned is stricter.
-// passing the wrong boolean to one of these parameters by mistake
-// goes easily unnoticed. Using an enum, the compiler can check that
-// the type of a value and the type of the parameter match.
 enum ControlDependency {
 Pinned,
+UnknownControl,
 DependsOnlyOnTest
 };
 private:
 // LoadNode::hash() doesn't take the _control_dependency field
 // into account: If the graph already has a non-pinned LoadNode and
 // we add a pinned LoadNode with the same inputs, it's safe for GVN
 // to replace the pinned LoadNode with the non-pinned LoadNode,
 // loads that can be reordered, and such requiring acquire semantics to
 // adhere to the Java specification.  The required behaviour is stored in
 // this field.
 const MemOrd _mo;
+AllocateNode* is_new_object_mark_load(PhaseGVN *phase) const;
 protected:
 virtual bool cmp(const Node &n) const;
 virtual uint size_of() const; // Size is bigger
 // Should LoadNode::Ideal() attempt to remove control edges?
 virtual bool can_remove_control() const;
 // Check if the load's memory input is a Phi node with the same control.
 bool is_instance_field_load_with_local_phi(Node* ctrl);
 Node* convert_to_unsigned_load(PhaseGVN& gvn);
 Node* convert_to_signed_load(PhaseGVN& gvn);
+void pin() { _control_dependency = Pinned; }
+bool has_unknown_control_dependency() const { return _control_dependency == UnknownControl; }
 #ifndef PRODUCT
 virtual void dump_spec(outputStream *st) const;
 #endif
 #ifdef ASSERT
 // Note: is_Mem() method returns 'true' for this class.
 class LoadStoreNode : public Node {
 private:
 const Type* const _type;      // What kind of value is loaded?
 const TypePtr* _adr_type;     // What kind of memory is being addressed?
+uint8_t _barrier; // Bit field with barrier information
 virtual uint size_of() const; // Size is bigger
 public:
 LoadStoreNode( Node *c, Node *mem, Node *adr, Node *val, const TypePtr* at, const Type* rt, uint required );
 virtual bool depends_only_on_test() const { return false; }
 virtual uint match_edge(uint idx) const { return idx == MemNode::Address || idx == MemNode::ValueIn; }
 virtual uint ideal_reg() const;
 virtual const class TypePtr *adr_type() const { return _adr_type; }  // returns bottom_type of address
 bool result_not_used() const;
 MemBarNode* trailing_membar() const;
+uint8_t barrier_data() { return _barrier; }
+void set_barrier_data(uint8_t barrier_data) { _barrier = barrier_data; }
 };
 class LoadStoreConditionalNode : public LoadStoreNode {
 public:
 enum {
 public:
 CompareAndSwapNode( Node *c, Node *mem, Node *adr, Node *val, Node *ex, MemNode::MemOrd mem_ord) : LoadStoreConditionalNode(c, mem, adr, val, ex), _mem_ord(mem_ord) {}
 MemNode::MemOrd order() const {
 return _mem_ord;
 }
+virtual uint size_of() const { return sizeof(*this); }
 };
 class CompareAndExchangeNode : public LoadStoreNode {
 private:
 const MemNode::MemOrd _mem_ord;
 }
 MemNode::MemOrd order() const {
 return _mem_ord;
 }
+virtual uint size_of() const { return sizeof(*this); }
 };
 //------------------------------CompareAndSwapBNode---------------------------
 class CompareAndSwapBNode : public CompareAndSwapNode {
 public:
 }
 return false;
 }
 };
+// cachewb node for guaranteeing writeback of the cache line at a
+// given address to (non-volatile) RAM
+class CacheWBNode : public Node {
+public:
+CacheWBNode(Node *ctrl, Node *mem, Node *addr) : Node(ctrl, mem, addr) {}
+virtual int Opcode() const;
+virtual uint ideal_reg() const { return NotAMachineReg; }
+virtual uint match_edge(uint idx) const { return (idx == 2); }
+virtual const TypePtr *adr_type() const { return TypePtr::BOTTOM; }
+virtual const Type *bottom_type() const { return Type::MEMORY; }
+};
+// cachewb pre sync node for ensuring that writebacks are serialised
+// relative to preceding or following stores
+class CacheWBPreSyncNode : public Node {
+public:
+CacheWBPreSyncNode(Node *ctrl, Node *mem) : Node(ctrl, mem) {}
+virtual int Opcode() const;
+virtual uint ideal_reg() const { return NotAMachineReg; }
+virtual uint match_edge(uint idx) const { return false; }
+virtual const TypePtr *adr_type() const { return TypePtr::BOTTOM; }
+virtual const Type *bottom_type() const { return Type::MEMORY; }
+};
+// cachewb pre sync node for ensuring that writebacks are serialised
+// relative to preceding or following stores
+class CacheWBPostSyncNode : public Node {
+public:
+CacheWBPostSyncNode(Node *ctrl, Node *mem) : Node(ctrl, mem) {}
+virtual int Opcode() const;
+virtual uint ideal_reg() const { return NotAMachineReg; }
+virtual uint match_edge(uint idx) const { return false; }
+virtual const TypePtr *adr_type() const { return TypePtr::BOTTOM; }
+virtual const Type *bottom_type() const { return Type::MEMORY; }
+};
 //------------------------------Prefetch---------------------------------------
 // Allocation prefetch which may fault, TLAB size have to be adjusted.
 class PrefetchAllocationNode : public Node {
 public:

branch	datagramsocketimpl-branch
changeset 58678	9cf78a70fa4f
parent 54327	a4d19817609c
child 58679	9c3209ff7550