1 /* |
1 /* |
2 * Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved. |
2 * Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved. |
3 * Copyright (c) 2014, 2015, Red Hat Inc. All rights reserved. |
3 * Copyright (c) 2014, 2019, Red Hat Inc. All rights reserved. |
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
5 * |
5 * |
6 * This code is free software; you can redistribute it and/or modify it |
6 * This code is free software; you can redistribute it and/or modify it |
7 * under the terms of the GNU General Public License version 2 only, as |
7 * under the terms of the GNU General Public License version 2 only, as |
8 * published by the Free Software Foundation. |
8 * published by the Free Software Foundation. |
168 void build_frame(int framesize); |
168 void build_frame(int framesize); |
169 void remove_frame(int framesize); |
169 void remove_frame(int framesize); |
170 |
170 |
171 virtual void _call_Unimplemented(address call_site) { |
171 virtual void _call_Unimplemented(address call_site) { |
172 mov(rscratch2, call_site); |
172 mov(rscratch2, call_site); |
173 haltsim(); |
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174 } |
173 } |
175 |
174 |
176 #define call_Unimplemented() _call_Unimplemented((address)__PRETTY_FUNCTION__) |
175 #define call_Unimplemented() _call_Unimplemented((address)__PRETTY_FUNCTION__) |
177 |
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178 virtual void notify(int type); |
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179 |
176 |
180 // aliases defined in AARCH64 spec |
177 // aliases defined in AARCH64 spec |
181 |
178 |
182 template<class T> |
179 template<class T> |
183 inline void cmpw(Register Rd, T imm) { subsw(zr, Rd, imm); } |
180 inline void cmpw(Register Rd, T imm) { subsw(zr, Rd, imm); } |
443 void mov_immediate32(Register dst, u_int32_t imm32); |
440 void mov_immediate32(Register dst, u_int32_t imm32); |
444 |
441 |
445 int push(unsigned int bitset, Register stack); |
442 int push(unsigned int bitset, Register stack); |
446 int pop(unsigned int bitset, Register stack); |
443 int pop(unsigned int bitset, Register stack); |
447 |
444 |
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445 int push_fp(unsigned int bitset, Register stack); |
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446 int pop_fp(unsigned int bitset, Register stack); |
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447 |
448 void mov(Register dst, Address a); |
448 void mov(Register dst, Address a); |
449 |
449 |
450 public: |
450 public: |
451 void push(RegSet regs, Register stack) { if (regs.bits()) push(regs.bits(), stack); } |
451 void push(RegSet regs, Register stack) { if (regs.bits()) push(regs.bits(), stack); } |
452 void pop(RegSet regs, Register stack) { if (regs.bits()) pop(regs.bits(), stack); } |
452 void pop(RegSet regs, Register stack) { if (regs.bits()) pop(regs.bits(), stack); } |
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453 |
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454 void push_fp(RegSet regs, Register stack) { if (regs.bits()) push_fp(regs.bits(), stack); } |
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455 void pop_fp(RegSet regs, Register stack) { if (regs.bits()) pop_fp(regs.bits(), stack); } |
453 |
456 |
454 // Push and pop everything that might be clobbered by a native |
457 // Push and pop everything that might be clobbered by a native |
455 // runtime call except rscratch1 and rscratch2. (They are always |
458 // runtime call except rscratch1 and rscratch2. (They are always |
456 // scratch, so we don't have to protect them.) Only save the lower |
459 // scratch, so we don't have to protect them.) Only save the lower |
457 // 64 bits of each vector register. |
460 // 64 bits of each vector register. |
786 void resolve_jobject(Register value, Register thread, Register tmp); |
789 void resolve_jobject(Register value, Register thread, Register tmp); |
787 |
790 |
788 // C 'boolean' to Java boolean: x == 0 ? 0 : 1 |
791 // C 'boolean' to Java boolean: x == 0 ? 0 : 1 |
789 void c2bool(Register x); |
792 void c2bool(Register x); |
790 |
793 |
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794 void load_method_holder(Register holder, Register method); |
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795 |
791 // oop manipulations |
796 // oop manipulations |
792 void load_klass(Register dst, Register src); |
797 void load_klass(Register dst, Register src); |
793 void store_klass(Register dst, Register src); |
798 void store_klass(Register dst, Register src); |
794 void cmp_klass(Register oop, Register trial_klass, Register tmp); |
799 void cmp_klass(Register oop, Register trial_klass, Register tmp); |
795 |
800 |
924 void check_klass_subtype(Register sub_klass, |
929 void check_klass_subtype(Register sub_klass, |
925 Register super_klass, |
930 Register super_klass, |
926 Register temp_reg, |
931 Register temp_reg, |
927 Label& L_success); |
932 Label& L_success); |
928 |
933 |
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934 void clinit_barrier(Register klass, |
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935 Register thread, |
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936 Label* L_fast_path = NULL, |
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937 Label* L_slow_path = NULL); |
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938 |
929 Address argument_address(RegisterOrConstant arg_slot, int extra_slot_offset = 0); |
939 Address argument_address(RegisterOrConstant arg_slot, int extra_slot_offset = 0); |
930 |
940 |
931 |
941 |
932 // Debugging |
942 // Debugging |
933 |
943 |
1176 // bootstraps into the generated ARM code which directly follows the |
1186 // bootstraps into the generated ARM code which directly follows the |
1177 // stub |
1187 // stub |
1178 // |
1188 // |
1179 |
1189 |
1180 public: |
1190 public: |
1181 // enum used for aarch64--x86 linkage to define return type of x86 function |
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1182 enum ret_type { ret_type_void, ret_type_integral, ret_type_float, ret_type_double}; |
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1183 |
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1184 #ifdef BUILTIN_SIM |
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1185 void c_stub_prolog(int gp_arg_count, int fp_arg_count, int ret_type, address *prolog_ptr = NULL); |
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1186 #else |
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1187 void c_stub_prolog(int gp_arg_count, int fp_arg_count, int ret_type) { } |
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1188 #endif |
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1189 |
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1190 // special version of call_VM_leaf_base needed for aarch64 simulator |
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1191 // where we need to specify both the gp and fp arg counts and the |
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1192 // return type so that the linkage routine from aarch64 to x86 and |
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1193 // back knows which aarch64 registers to copy to x86 registers and |
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1194 // which x86 result register to copy back to an aarch64 register |
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1195 |
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1196 void call_VM_leaf_base1( |
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1197 address entry_point, // the entry point |
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1198 int number_of_gp_arguments, // the number of gp reg arguments to pass |
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1199 int number_of_fp_arguments, // the number of fp reg arguments to pass |
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1200 ret_type type, // the return type for the call |
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1201 Label* retaddr = NULL |
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1202 ); |
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1203 |
1191 |
1204 void ldr_constant(Register dest, const Address &const_addr) { |
1192 void ldr_constant(Register dest, const Address &const_addr) { |
1205 if (NearCpool) { |
1193 if (NearCpool) { |
1206 ldr(dest, const_addr); |
1194 ldr(dest, const_addr); |
1207 } else { |
1195 } else { |
1360 spill(tmp1, true, dst_offset); |
1348 spill(tmp1, true, dst_offset); |
1361 unspill(tmp1, true, src_offset+8); |
1349 unspill(tmp1, true, src_offset+8); |
1362 spill(tmp1, true, dst_offset+8); |
1350 spill(tmp1, true, dst_offset+8); |
1363 } |
1351 } |
1364 } |
1352 } |
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1353 |
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1354 void cache_wb(Address line); |
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1355 void cache_wbsync(bool is_pre); |
1365 }; |
1356 }; |
1366 |
1357 |
1367 #ifdef ASSERT |
1358 #ifdef ASSERT |
1368 inline bool AbstractAssembler::pd_check_instruction_mark() { return false; } |
1359 inline bool AbstractAssembler::pd_check_instruction_mark() { return false; } |
1369 #endif |
1360 #endif |