jdk-sandbox: comparison src/hotspot/cpu/aarch64/macroAssembler

equal deleted inserted replaced

-:13588c901957
+:9cf78a70fa4f
 if (PrintBiasedLockingStatistics && counters == NULL)
 counters = BiasedLocking::counters();
 assert_different_registers(lock_reg, obj_reg, swap_reg, tmp_reg, rscratch1, rscratch2, noreg);
-assert(markOopDesc::age_shift == markOopDesc::lock_bits + markOopDesc::biased_lock_bits, "biased locking makes assumptions about bit layout");
+assert(markWord::age_shift == markWord::lock_bits + markWord::biased_lock_bits, "biased locking makes assumptions about bit layout");
 Address mark_addr      (obj_reg, oopDesc::mark_offset_in_bytes());
 Address klass_addr     (obj_reg, oopDesc::klass_offset_in_bytes());
 Address saved_mark_addr(lock_reg, 0);
 // Biased locking
 int null_check_offset = -1;
 if (!swap_reg_contains_mark) {
 null_check_offset = offset();
 ldr(swap_reg, mark_addr);
 }
-andr(tmp_reg, swap_reg, markOopDesc::biased_lock_mask_in_place);
+andr(tmp_reg, swap_reg, markWord::biased_lock_mask_in_place);
-cmp(tmp_reg, (u1)markOopDesc::biased_lock_pattern);
+cmp(tmp_reg, (u1)markWord::biased_lock_pattern);
 br(Assembler::NE, cas_label);
 // The bias pattern is present in the object's header. Need to check
 // whether the bias owner and the epoch are both still current.
 load_prototype_header(tmp_reg, obj_reg);
 orr(tmp_reg, tmp_reg, rthread);
 eor(tmp_reg, swap_reg, tmp_reg);
-andr(tmp_reg, tmp_reg, ~((int) markOopDesc::age_mask_in_place));
+andr(tmp_reg, tmp_reg, ~((int) markWord::age_mask_in_place));
 if (counters != NULL) {
 Label around;
 cbnz(tmp_reg, around);
 atomic_incw(Address((address)counters->biased_lock_entry_count_addr()), tmp_reg, rscratch1, rscratch2);
 b(done);
 // header.
 // If the low three bits in the xor result aren't clear, that means
 // the prototype header is no longer biased and we have to revoke
 // the bias on this object.
-andr(rscratch1, tmp_reg, markOopDesc::biased_lock_mask_in_place);
+andr(rscratch1, tmp_reg, markWord::biased_lock_mask_in_place);
 cbnz(rscratch1, try_revoke_bias);
 // Biasing is still enabled for this data type. See whether the
 // epoch of the current bias is still valid, meaning that the epoch
 // bits of the mark word are equal to the epoch bits of the
 // only change at a safepoint.) If not, attempt to rebias the object
 // toward the current thread. Note that we must be absolutely sure
 // that the current epoch is invalid in order to do this because
 // otherwise the manipulations it performs on the mark word are
 // illegal.
-andr(rscratch1, tmp_reg, markOopDesc::epoch_mask_in_place);
+andr(rscratch1, tmp_reg, markWord::epoch_mask_in_place);
 cbnz(rscratch1, try_rebias);
 // The epoch of the current bias is still valid but we know nothing
 // about the owner; it might be set or it might be clear. Try to
 // acquire the bias of the object using an atomic operation. If this
 // fails we will go in to the runtime to revoke the object's bias.
 // Note that we first construct the presumed unbiased header so we
 // don't accidentally blow away another thread's valid bias.
 {
 Label here;
-mov(rscratch1, markOopDesc::biased_lock_mask_in_place | markOopDesc::age_mask_in_place | markOopDesc::epoch_mask_in_place);
+mov(rscratch1, markWord::biased_lock_mask_in_place | markWord::age_mask_in_place | markWord::epoch_mask_in_place);
 andr(swap_reg, swap_reg, rscratch1);
 orr(tmp_reg, swap_reg, rthread);
 cmpxchg_obj_header(swap_reg, tmp_reg, obj_reg, rscratch1, here, slow_case);
 // If the biasing toward our thread failed, this means that
 // another thread succeeded in biasing it toward itself and we
 // First, the interpreter checks for IllegalMonitorStateException at
 // a higher level. Second, if the bias was revoked while we held the
 // lock, the object could not be rebiased toward another thread, so
 // the bias bit would be clear.
 ldr(temp_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
-andr(temp_reg, temp_reg, markOopDesc::biased_lock_mask_in_place);
+andr(temp_reg, temp_reg, markWord::biased_lock_mask_in_place);
-cmp(temp_reg, (u1)markOopDesc::biased_lock_pattern);
+cmp(temp_reg, (u1)markWord::biased_lock_pattern);
 br(Assembler::EQ, done);
 }
 static void pass_arg0(MacroAssembler* masm, Register arg) {
 if (c_rarg0 != arg ) {
 if (offset != 0)
 add(tmp, tmp, offset);
 return RegisterOrConstant(tmp);
-}
-void MacroAssembler:: notify(int type) {
-if (type == bytecode_start) {
-// set_last_Java_frame(esp, rfp, (address)NULL);
-Assembler:: notify(type);
-// reset_last_Java_frame(true);
-}
-else
-Assembler:: notify(type);
 }
 // Look up the method for a megamorphic invokeinterface call.
 // The target method is determined by <intf_klass, itable_index>.
 // The receiver klass is in recv_klass.
 #undef IS_A_TEMP
 bind(L_fallthrough);
 }
+void MacroAssembler::clinit_barrier(Register klass, Register scratch, Label* L_fast_path, Label* L_slow_path) {
+assert(L_fast_path != NULL || L_slow_path != NULL, "at least one is required");
+assert_different_registers(klass, rthread, scratch);
+Label L_fallthrough, L_tmp;
+if (L_fast_path == NULL) {
+L_fast_path = &L_fallthrough;
+} else if (L_slow_path == NULL) {
+L_slow_path = &L_fallthrough;
+}
+// Fast path check: class is fully initialized
+ldrb(scratch, Address(klass, InstanceKlass::init_state_offset()));
+subs(zr, scratch, InstanceKlass::fully_initialized);
+br(Assembler::EQ, *L_fast_path);
+// Fast path check: current thread is initializer thread
+ldr(scratch, Address(klass, InstanceKlass::init_thread_offset()));
+cmp(rthread, scratch);
+if (L_slow_path == &L_fallthrough) {
+br(Assembler::EQ, *L_fast_path);
+bind(*L_slow_path);
+} else if (L_fast_path == &L_fallthrough) {
+br(Assembler::NE, *L_slow_path);
+bind(*L_fast_path);
+} else {
+Unimplemented();
+}
+}
 void MacroAssembler::verify_oop(Register reg, const char* s) {
 if (!VerifyOops) return;
 // Pass register number to verify_oop_subroutine
 }
 void MacroAssembler::call_VM_leaf_base(address entry_point,
 int number_of_arguments,
 Label *retaddr) {
-call_VM_leaf_base1(entry_point, number_of_arguments, 0, ret_type_integral, retaddr);
-}
-void MacroAssembler::call_VM_leaf_base1(address entry_point,
-int number_of_gp_arguments,
-int number_of_fp_arguments,
-ret_type type,
-Label *retaddr) {
 Label E, L;
 stp(rscratch1, rmethod, Address(pre(sp, -2 * wordSize)));
-// We add 1 to number_of_arguments because the thread in arg0 is
-// not counted
 mov(rscratch1, entry_point);
-blrt(rscratch1, number_of_gp_arguments + 1, number_of_fp_arguments, type);
+blr(rscratch1);
 if (retaddr)
 bind(*retaddr);
 ldp(rscratch1, rmethod, Address(post(sp, 2 * wordSize)));
 maybe_isb();
 assert(words_pushed == count, "oops, pushed != count");
 return count;
 }
+// Push lots of registers in the bit set supplied.  Don't push sp.
+// Return the number of words pushed
+int MacroAssembler::push_fp(unsigned int bitset, Register stack) {
+int words_pushed = 0;
+// Scan bitset to accumulate register pairs
+unsigned char regs[32];
+int count = 0;
+for (int reg = 0; reg <= 31; reg++) {
+if (1 & bitset)
+regs[count++] = reg;
+bitset >>= 1;
+}
+regs[count++] = zr->encoding_nocheck();
+count &= ~1;  // Only push an even number of regs
+// Always pushing full 128 bit registers.
+if (count) {
+stpq(as_FloatRegister(regs[0]), as_FloatRegister(regs[1]), Address(pre(stack, -count * wordSize * 2)));
+words_pushed += 2;
+}
+for (int i = 2; i < count; i += 2) {
+stpq(as_FloatRegister(regs[i]), as_FloatRegister(regs[i+1]), Address(stack, i * wordSize * 2));
+words_pushed += 2;
+}
+assert(words_pushed == count, "oops, pushed != count");
+return count;
+}
+int MacroAssembler::pop_fp(unsigned int bitset, Register stack) {
+int words_pushed = 0;
+// Scan bitset to accumulate register pairs
+unsigned char regs[32];
+int count = 0;
+for (int reg = 0; reg <= 31; reg++) {
+if (1 & bitset)
+regs[count++] = reg;
+bitset >>= 1;
+}
+regs[count++] = zr->encoding_nocheck();
+count &= ~1;
+for (int i = 2; i < count; i += 2) {
+ldpq(as_FloatRegister(regs[i]), as_FloatRegister(regs[i+1]), Address(stack, i * wordSize * 2));
+words_pushed += 2;
+}
+if (count) {
+ldpq(as_FloatRegister(regs[0]), as_FloatRegister(regs[1]), Address(post(stack, count * wordSize * 2)));
+words_pushed += 2;
+}
+assert(words_pushed == count, "oops, pushed != count");
+return count;
+}
 #ifdef ASSERT
 void MacroAssembler::verify_heapbase(const char* msg) {
 #if 0
 assert (UseCompressedOops || UseCompressedClassPointers, "should be compressed");
 assert (Universe::heap() != NULL, "java heap should be initialized");
 pusha();
 mov(c_rarg0, (address)msg);
 mov(c_rarg1, (address)ip);
 mov(c_rarg2, sp);
 mov(c_rarg3, CAST_FROM_FN_PTR(address, MacroAssembler::debug64));
-// call(c_rarg3);
+blr(c_rarg3);
-blrt(c_rarg3, 3, 0, 1);
 hlt(0);
 }
 void MacroAssembler::warn(const char* msg) {
 pusha();
 mov(c_rarg0, (address)msg);
 mov(lr, CAST_FROM_FN_PTR(address, warning));
-blrt(lr, 1, 0, MacroAssembler::ret_type_void);
+blr(lr);
 popa();
 }
 void MacroAssembler::unimplemented(const char* what) {
 const char* buf = NULL;
 tty->print_cr("r28 = 0x%016lx", regs[28]);
 tty->print_cr("r30 = 0x%016lx", regs[30]);
 tty->print_cr("r31 = 0x%016lx", regs[31]);
 BREAKPOINT;
 }
-ThreadStateTransition::transition(thread, _thread_in_vm, saved_state);
+}
-} else {
+fatal("DEBUG MESSAGE: %s", msg);
-ttyLocker ttyl;
+}
-::tty->print_cr("=============== DEBUG MESSAGE: %s ================\n",
-msg);
-assert(false, "DEBUG MESSAGE: %s", msg);
-}
-}
-#ifdef BUILTIN_SIM
-// routine to generate an x86 prolog for a stub function which
-// bootstraps into the generated ARM code which directly follows the
-// stub
-//
-// the argument encodes the number of general and fp registers
-// passed by the caller and the callng convention (currently just
-// the number of general registers and assumes C argument passing)
-extern "C" {
-int aarch64_stub_prolog_size();
-void aarch64_stub_prolog();
-void aarch64_prolog();
-}
-void MacroAssembler::c_stub_prolog(int gp_arg_count, int fp_arg_count, int ret_type,
-address *prolog_ptr)
-{
-int calltype = (((ret_type & 0x3) << 8) |
-((fp_arg_count & 0xf) << 4) |
-(gp_arg_count & 0xf));
-// the addresses for the x86 to ARM entry code we need to use
-address start = pc();
-// printf("start = %lx\n", start);
-int byteCount =  aarch64_stub_prolog_size();
-// printf("byteCount = %x\n", byteCount);
-int instructionCount = (byteCount + 3)/ 4;
-// printf("instructionCount = %x\n", instructionCount);
-for (int i = 0; i < instructionCount; i++) {
-nop();
-}
-memcpy(start, (void*)aarch64_stub_prolog, byteCount);
-// write the address of the setup routine and the call format at the
-// end of into the copied code
-u_int64_t *patch_end = (u_int64_t *)(start + byteCount);
-if (prolog_ptr)
-patch_end[-2] = (u_int64_t)prolog_ptr;
-patch_end[-1] = calltype;
-}
-#endif
 void MacroAssembler::push_call_clobbered_registers() {
 int step = 4 * wordSize;
 push(RegSet::range(r0, r18) - RegSet::of(rscratch1, rscratch2), sp);
 sub(sp, sp, step);
 //   Aligned - 12 bits unsigned offset shifted
 Register base = sp;
 if ((offset & (size-1)) && offset >= (1<<8)) {
 add(tmp, base, offset & ((1<<12)-1));
 base = tmp;
-offset &= -1<<12;
+offset &= -1u<<12;
 }
 if (offset >= (1<<12) * size) {
 add(tmp, base, offset & (((1<<12)-1)<<12));
 base = tmp;
 void MacroAssembler::cmpoop(Register obj1, Register obj2) {
 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
 bs->obj_equals(this, obj1, obj2);
 }
+void MacroAssembler::load_method_holder(Register holder, Register method) {
+ldr(holder, Address(method, Method::const_offset()));                      // ConstMethod*
+ldr(holder, Address(holder, ConstMethod::constants_offset()));             // ConstantPool*
+ldr(holder, Address(holder, ConstantPool::pool_holder_offset_in_bytes())); // InstanceKlass*
+}
 void MacroAssembler::load_klass(Register dst, Register src) {
 if (UseCompressedClassPointers) {
 ldrw(dst, Address(src, oopDesc::klass_offset_in_bytes()));
 decode_klass_not_null(dst);
 } else {
 {
 ThreadInVMfromUnknown tiv;
 assert (UseCompressedOops, "should only be used for compressed oops");
 assert (Universe::heap() != NULL, "java heap should be initialized");
 assert (oop_recorder() != NULL, "this assembler needs an OopRecorder");
-assert(Universe::heap()->is_in_reserved(JNIHandles::resolve(obj)), "should be real oop");
+assert(Universe::heap()->is_in(JNIHandles::resolve(obj)), "should be real oop");
 }
 #endif
 int oop_index = oop_recorder()->find_index(obj);
 InstructionMark im(this);
 RelocationHolder rspec = oop_Relocation::spec(oop_index);
 void  MacroAssembler::set_narrow_klass(Register dst, Klass* k) {
 assert (UseCompressedClassPointers, "should only be used for compressed headers");
 assert (oop_recorder() != NULL, "this assembler needs an OopRecorder");
 int index = oop_recorder()->find_index(k);
-assert(! Universe::heap()->is_in_reserved(k), "should not be an oop");
+assert(! Universe::heap()->is_in(k), "should not be an oop");
 InstructionMark im(this);
 RelocationHolder rspec = metadata_Relocation::spec(index);
 code_section()->relocate(inst_mark(), rspec);
 narrowKlass nk = CompressedKlassPointers::encode(k);
 oop_index = oop_recorder()->allocate_oop_index(obj);
 } else {
 #ifdef ASSERT
 {
 ThreadInVMfromUnknown tiv;
-assert(Universe::heap()->is_in_reserved(JNIHandles::resolve(obj)), "should be real oop");
+assert(Universe::heap()->is_in(JNIHandles::resolve(obj)), "should be real oop");
 }
 #endif
 oop_index = oop_recorder()->find_index(obj);
 }
 RelocationHolder rspec = oop_Relocation::spec(oop_index);
 Address MacroAssembler::constant_oop_address(jobject obj) {
 #ifdef ASSERT
 {
 ThreadInVMfromUnknown tiv;
 assert(oop_recorder() != NULL, "this assembler needs an OopRecorder");
-assert(Universe::heap()->is_in_reserved(JNIHandles::resolve(obj)), "not an oop");
+assert(Universe::heap()->is_in(JNIHandles::resolve(obj)), "not an oop");
 }
 #endif
 int oop_index = oop_recorder()->find_index(obj);
 return Address((address)obj, oop_Relocation::spec(oop_index));
 }
 NEXT_32_START, NEXT_32_PRFM_START;
 Register tmp1 = rscratch1, tmp2 = rscratch2;
 mov(result, len); // Save initial len
-#ifndef BUILTIN_SIM
 cmp(len, (u1)8); // handle shortest strings first
 br(LT, LOOP_1);
 cmp(len, (u1)32);
 br(LT, NEXT_8);
 // The following code uses the SIMD 'uzp1' and 'uzp2' instructions
 add(src, src, 16);
 cmp(len, (u1)8);
 br(GE, NEXT_8);
 BIND(LOOP_1);
-#endif
 cbz(len, DONE);
 BIND(NEXT_1);
 ldrh(tmp1, Address(post(src, 2)));
 tst(tmp1, 0xff00);
 br(NE, SET_RESULT);
 void MacroAssembler::get_thread(Register dst) {
 RegSet saved_regs = RegSet::range(r0, r1) + lr - dst;
 push(saved_regs, sp);
 mov(lr, CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper));
-blrt(lr, 1, 0, 1);
+blr(lr);
 if (dst != c_rarg0) {
 mov(dst, c_rarg0);
 }
 pop(saved_regs, sp);
 }
+void MacroAssembler::cache_wb(Address line) {
+assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");
+assert(line.index() == noreg, "index should be noreg");
+assert(line.offset() == 0, "offset should be 0");
+// would like to assert this
+// assert(line._ext.shift == 0, "shift should be zero");
+if (VM_Version::supports_dcpop()) {
+// writeback using clear virtual address to point of persistence
+dc(Assembler::CVAP, line.base());
+} else {
+// no need to generate anything as Unsafe.writebackMemory should
+// never invoke this stub
+}
+}
+void MacroAssembler::cache_wbsync(bool is_pre) {
+// we only need a barrier post sync
+if (!is_pre) {
+membar(Assembler::AnyAny);
+}
+}

branch	datagramsocketimpl-branch
changeset 58678	9cf78a70fa4f
parent 54786	ebf733a324d4
child 58679	9c3209ff7550