5836 

  5837 void MacroAssembler::cache_wb(Address line) {

  5838   assert(line.getMode() == Address::base_plus_offset, "mode should be base_plus_offset");

  5839   assert(line.index() == noreg, "index should be noreg");

  5840   assert(line.offset() == 0, "offset should be 0");

  5841   // would like to assert this

  5842   // assert(line._ext.shift == 0, "shift should be zero");

  5843   if (VM_Version::supports_dcpop()) {

  5844     // writeback using clear virtual address to point of persistence

  5845     dc(Assembler::CVAP, line.base());

  5846   } else {

  5847     // no need to generate anything as Unsafe.writebackMemory should

  5848     // never invoke this stub

  5849   }

  5850 }

  5851 

  5852 void MacroAssembler::cache_wbsync(bool is_pre) {

  5853   // we only need a barrier post sync

  5854   if (!is_pre) {

  5855     membar(Assembler::AnyAny);

  5856   }

  5857 }