src/hotspot/cpu/sparc/register_sparc.hpp
changeset 53244 9807daeb47c4
parent 49625 94ef8da94ce9
equal deleted inserted replaced
53243:8bea4144b21c 53244:9807daeb47c4
     1 /*
     1 /*
     2  * Copyright (c) 2000, 2014, Oracle and/or its affiliates. All rights reserved.
     2  * Copyright (c) 2000, 2019, Oracle and/or its affiliates. All rights reserved.
     3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
     3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
     4  *
     4  *
     5  * This code is free software; you can redistribute it and/or modify it
     5  * This code is free software; you can redistribute it and/or modify it
     6  * under the terms of the GNU General Public License version 2 only, as
     6  * under the terms of the GNU General Public License version 2 only, as
     7  * published by the Free Software Foundation.
     7  * published by the Free Software Foundation.
    20  * or visit www.oracle.com if you need additional information or have any
    20  * or visit www.oracle.com if you need additional information or have any
    21  * questions.
    21  * questions.
    22  *
    22  *
    23  */
    23  */
    24 
    24 
    25 #ifndef CPU_SPARC_VM_REGISTER_SPARC_HPP
    25 #ifndef CPU_SPARC_REGISTER_SPARC_HPP
    26 #define CPU_SPARC_VM_REGISTER_SPARC_HPP
    26 #define CPU_SPARC_REGISTER_SPARC_HPP
    27 
    27 
    28 #include "asm/register.hpp"
    28 #include "asm/register.hpp"
    29 
    29 
    30 // forward declaration
    30 // forward declaration
    31 class Address;
    31 class Address;
   335     assert(encoding < 32 && ((encoding & 2) == 0), "bad quad float register encoding");
   335     assert(encoding < 32 && ((encoding & 2) == 0), "bad quad float register encoding");
   336     return as_FloatRegister( ((encoding & 1) << 5) | (encoding & 0x1c) );
   336     return as_FloatRegister( ((encoding & 1) << 5) | (encoding & 0x1c) );
   337   }
   337   }
   338 };
   338 };
   339 
   339 
   340 #endif // CPU_SPARC_VM_REGISTER_SPARC_HPP
   340 #endif // CPU_SPARC_REGISTER_SPARC_HPP