src/hotspot/cpu/aarch64/vmreg_aarch64.inline.hpp
changeset 53244 9807daeb47c4
parent 47216 71c04702a3d5
equal deleted inserted replaced
53243:8bea4144b21c 53244:9807daeb47c4
     1 /*
     1 /*
     2  * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved.
     2  * Copyright (c) 2006, 2019, Oracle and/or its affiliates. All rights reserved.
     3  * Copyright (c) 2014, Red Hat Inc. All rights reserved.
     3  * Copyright (c) 2014, Red Hat Inc. All rights reserved.
     4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
     4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
     5  *
     5  *
     6  * This code is free software; you can redistribute it and/or modify it
     6  * This code is free software; you can redistribute it and/or modify it
     7  * under the terms of the GNU General Public License version 2 only, as
     7  * under the terms of the GNU General Public License version 2 only, as
    21  * or visit www.oracle.com if you need additional information or have any
    21  * or visit www.oracle.com if you need additional information or have any
    22  * questions.
    22  * questions.
    23  *
    23  *
    24  */
    24  */
    25 
    25 
    26 #ifndef CPU_AARCH64_VM_VMREG_AARCH64_INLINE_HPP
    26 #ifndef CPU_AARCH64_VMREG_AARCH64_INLINE_HPP
    27 #define CPU_AARCH64_VM_VMREG_AARCH64_INLINE_HPP
    27 #define CPU_AARCH64_VMREG_AARCH64_INLINE_HPP
    28 
    28 
    29 inline VMReg RegisterImpl::as_VMReg() {
    29 inline VMReg RegisterImpl::as_VMReg() {
    30   if( this==noreg ) return VMRegImpl::Bad();
    30   if( this==noreg ) return VMRegImpl::Bad();
    31   return VMRegImpl::as_VMReg(encoding() << 1 );
    31   return VMRegImpl::as_VMReg(encoding() << 1 );
    32 }
    32 }
    33 
    33 
    34 inline VMReg FloatRegisterImpl::as_VMReg() {
    34 inline VMReg FloatRegisterImpl::as_VMReg() {
    35   return VMRegImpl::as_VMReg((encoding() << 1) + ConcreteRegisterImpl::max_gpr);
    35   return VMRegImpl::as_VMReg((encoding() << 1) + ConcreteRegisterImpl::max_gpr);
    36 }
    36 }
    37 
    37 
    38 #endif // CPU_AARCH64_VM_VMREG_AARCH64_INLINE_HPP
    38 #endif // CPU_AARCH64_VMREG_AARCH64_INLINE_HPP