equal
deleted
inserted
replaced
423 } |
423 } |
424 break; |
424 break; |
425 |
425 |
426 #ifdef _LP64 |
426 #ifdef _LP64 |
427 case T_LONG: |
427 case T_LONG: |
428 assert(sig_bt[i+1] == T_VOID, "expecting VOID in other half"); |
428 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "expecting VOID in other half"); |
429 // fall-through |
429 // fall-through |
430 case T_OBJECT: |
430 case T_OBJECT: |
431 case T_ARRAY: |
431 case T_ARRAY: |
432 case T_ADDRESS: // Used, e.g., in slow-path locking for the lock's stack address |
432 case T_ADDRESS: // Used, e.g., in slow-path locking for the lock's stack address |
433 if (int_reg < int_reg_max) { |
433 if (int_reg < int_reg_max) { |
439 slot += 2; |
439 slot += 2; |
440 } |
440 } |
441 break; |
441 break; |
442 #else |
442 #else |
443 case T_LONG: |
443 case T_LONG: |
444 assert(sig_bt[i+1] == T_VOID, "expecting VOID in other half"); |
444 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "expecting VOID in other half"); |
445 // On 32-bit SPARC put longs always on the stack to keep the pressure off |
445 // On 32-bit SPARC put longs always on the stack to keep the pressure off |
446 // integer argument registers. They should be used for oops. |
446 // integer argument registers. They should be used for oops. |
447 slot = round_to(slot, 2); // align |
447 slot = round_to(slot, 2); // align |
448 regs[i].set2(VMRegImpl::stack2reg(slot)); |
448 regs[i].set2(VMRegImpl::stack2reg(slot)); |
449 slot += 2; |
449 slot += 2; |
458 regs[i].set1(VMRegImpl::stack2reg(slot++)); |
458 regs[i].set1(VMRegImpl::stack2reg(slot++)); |
459 } |
459 } |
460 break; |
460 break; |
461 |
461 |
462 case T_DOUBLE: |
462 case T_DOUBLE: |
463 assert(sig_bt[i+1] == T_VOID, "expecting half"); |
463 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "expecting half"); |
464 if (round_to(flt_reg, 2) + 1 < flt_reg_max) { |
464 if (round_to(flt_reg, 2) + 1 < flt_reg_max) { |
465 flt_reg = round_to(flt_reg, 2); // align |
465 flt_reg = round_to(flt_reg, 2); // align |
466 FloatRegister r = as_FloatRegister(flt_reg); |
466 FloatRegister r = as_FloatRegister(flt_reg); |
467 regs[i].set2(r->as_VMReg()); |
467 regs[i].set2(r->as_VMReg()); |
468 flt_reg += 2; |
468 flt_reg += 2; |
1172 case T_INT: |
1172 case T_INT: |
1173 case T_SHORT: |
1173 case T_SHORT: |
1174 regs[i].set1(int_stk_helper(j)); |
1174 regs[i].set1(int_stk_helper(j)); |
1175 break; |
1175 break; |
1176 case T_LONG: |
1176 case T_LONG: |
1177 assert(sig_bt[i+1] == T_VOID, "expecting half"); |
1177 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "expecting half"); |
1178 case T_ADDRESS: // raw pointers, like current thread, for VM calls |
1178 case T_ADDRESS: // raw pointers, like current thread, for VM calls |
1179 case T_ARRAY: |
1179 case T_ARRAY: |
1180 case T_OBJECT: |
1180 case T_OBJECT: |
1181 case T_METADATA: |
1181 case T_METADATA: |
1182 regs[i].set2(int_stk_helper(j)); |
1182 regs[i].set2(int_stk_helper(j)); |
1207 } |
1207 } |
1208 } |
1208 } |
1209 break; |
1209 break; |
1210 case T_DOUBLE: |
1210 case T_DOUBLE: |
1211 { |
1211 { |
1212 assert(sig_bt[i + 1] == T_VOID, "expecting half"); |
1212 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half"); |
1213 // V9ism: doubles go in EVEN/ODD regs and stack slots |
1213 // V9ism: doubles go in EVEN/ODD regs and stack slots |
1214 int double_index = (j << 1); |
1214 int double_index = (j << 1); |
1215 param_array_reg.set2(VMRegImpl::stack2reg(double_index)); |
1215 param_array_reg.set2(VMRegImpl::stack2reg(double_index)); |
1216 if (j < 16) { |
1216 if (j < 16) { |
1217 regs[i].set2(as_FloatRegister(double_index)->as_VMReg()); |
1217 regs[i].set2(as_FloatRegister(double_index)->as_VMReg()); |
1259 case T_SHORT: |
1259 case T_SHORT: |
1260 regs[i].set1(int_stk_helper(i)); |
1260 regs[i].set1(int_stk_helper(i)); |
1261 break; |
1261 break; |
1262 case T_DOUBLE: |
1262 case T_DOUBLE: |
1263 case T_LONG: |
1263 case T_LONG: |
1264 assert(sig_bt[i + 1] == T_VOID, "expecting half"); |
1264 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half"); |
1265 regs[i].set_pair(int_stk_helper(i + 1), int_stk_helper(i)); |
1265 regs[i].set_pair(int_stk_helper(i + 1), int_stk_helper(i)); |
1266 break; |
1266 break; |
1267 case T_VOID: regs[i].set_bad(); break; |
1267 case T_VOID: regs[i].set_bad(); break; |
1268 default: |
1268 default: |
1269 ShouldNotReachHere(); |
1269 ShouldNotReachHere(); |