jdk-sandbox: comparison hotspot/src/cpu/ppc/vm/ppc.ad

equal deleted inserted replaced

-:9139bd899e16
+:9631f7d691dc
 bool MachConstantBaseNode::requires_postalloc_expand() const { return true; }
 void MachConstantBaseNode::postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_) {
 Compile *C = ra_->C;
-iRegPdstOper *op_dst = new (C) iRegPdstOper();
+iRegPdstOper *op_dst = new iRegPdstOper();
-MachNode *m1 = new (C) loadToc_hiNode();
+MachNode *m1 = new loadToc_hiNode();
-MachNode *m2 = new (C) loadToc_loNode();
+MachNode *m2 = new loadToc_loNode();
 m1->add_req(NULL);
 m2->add_req(NULL, m1);
 m1->_opnds[0] = op_dst;
 m2->_opnds[0] = op_dst;
 /* TODO: PPC port
 // Make a new machine dependent decode node (with its operands).
 MachTypeNode *Matcher::make_decode_node(Compile *C) {
 assert(Universe::narrow_oop_base() == NULL && Universe::narrow_oop_shift() == 0,
 "This method is only implemented for unscaled cOops mode so far");
-MachTypeNode *decode = new (C) decodeN_unscaledNode();
+MachTypeNode *decode = new decodeN_unscaledNode();
-decode->set_opnd_array(0, new (C) iRegPdstOper());
+decode->set_opnd_array(0, new iRegPdstOper());
-decode->set_opnd_array(1, new (C) iRegNsrcOper());
+decode->set_opnd_array(1, new iRegNsrcOper());
 return decode;
 }
 */
 // Threshold size for cleararray.
 const int Matcher::init_array_short_size = 8 * BytesPerLong;
 loadConLNodesTuple nodes;
 const bool large_constant_pool = true; // TODO: PPC port C->cfg()->_consts_size > 4000;
 if (large_constant_pool) {
 // Create new nodes.
-loadConL_hiNode *m1 = new (C) loadConL_hiNode();
+loadConL_hiNode *m1 = new loadConL_hiNode();
-loadConL_loNode *m2 = new (C) loadConL_loNode();
+loadConL_loNode *m2 = new loadConL_loNode();
 // inputs for new nodes
 m1->add_req(NULL, toc);
 m2->add_req(NULL, m1);
 // operands for new nodes
-m1->_opnds[0] = new (C) iRegLdstOper(); // dst
+m1->_opnds[0] = new iRegLdstOper(); // dst
-m1->_opnds[1] = immSrc;                 // src
+m1->_opnds[1] = immSrc;             // src
-m1->_opnds[2] = new (C) iRegPdstOper(); // toc
+m1->_opnds[2] = new iRegPdstOper(); // toc
-m2->_opnds[0] = new (C) iRegLdstOper(); // dst
+m2->_opnds[0] = new iRegLdstOper(); // dst
-m2->_opnds[1] = immSrc;                 // src
+m2->_opnds[1] = immSrc;             // src
-m2->_opnds[2] = new (C) iRegLdstOper(); // base
+m2->_opnds[2] = new iRegLdstOper(); // base
 // Initialize ins_attrib TOC fields.
 m1->_const_toc_offset = -1;
 m2->_const_toc_offset_hi_node = m1;
 nodes._large_lo = m2;
 nodes._small = NULL;
 nodes._last = nodes._large_lo;
 assert(m2->bottom_type()->isa_long(), "must be long");
 } else {
-loadConLNode *m2 = new (C) loadConLNode();
+loadConLNode *m2 = new loadConLNode();
 // inputs for new nodes
 m2->add_req(NULL, toc);
 // operands for new nodes
-m2->_opnds[0] = new (C) iRegLdstOper(); // dst
+m2->_opnds[0] = new iRegLdstOper(); // dst
-m2->_opnds[1] = immSrc;                 // src
+m2->_opnds[1] = immSrc;             // src
-m2->_opnds[2] = new (C) iRegPdstOper(); // toc
+m2->_opnds[2] = new iRegPdstOper(); // toc
 // Initialize ins_attrib instruction offset.
 m2->_cbuf_insts_offset = -1;
 // register allocation for new nodes
 // expand.
 enc_class postalloc_expand_load_ptr_constant(iRegPdst dst, immP src, iRegLdst toc) %{
 const bool large_constant_pool = true; // TODO: PPC port C->cfg()->_consts_size > 4000;
 if (large_constant_pool) {
 // Create new nodes.
-loadConP_hiNode *m1 = new (C) loadConP_hiNode();
+loadConP_hiNode *m1 = new loadConP_hiNode();
-loadConP_loNode *m2 = new (C) loadConP_loNode();
+loadConP_loNode *m2 = new loadConP_loNode();
 // inputs for new nodes
 m1->add_req(NULL, n_toc);
 m2->add_req(NULL, m1);
 // operands for new nodes
-m1->_opnds[0] = new (C) iRegPdstOper(); // dst
+m1->_opnds[0] = new iRegPdstOper(); // dst
-m1->_opnds[1] = op_src;                 // src
+m1->_opnds[1] = op_src;             // src
-m1->_opnds[2] = new (C) iRegPdstOper(); // toc
+m1->_opnds[2] = new iRegPdstOper(); // toc
-m2->_opnds[0] = new (C) iRegPdstOper(); // dst
+m2->_opnds[0] = new iRegPdstOper(); // dst
-m2->_opnds[1] = op_src;                 // src
+m2->_opnds[1] = op_src;             // src
-m2->_opnds[2] = new (C) iRegLdstOper(); // base
+m2->_opnds[2] = new iRegLdstOper(); // base
 // Initialize ins_attrib TOC fields.
 m1->_const_toc_offset = -1;
 m2->_const_toc_offset_hi_node = m1;
 nodes->push(m1);
 nodes->push(m2);
 assert(m2->bottom_type()->isa_ptr(), "must be ptr");
 } else {
-loadConPNode *m2 = new (C) loadConPNode();
+loadConPNode *m2 = new loadConPNode();
 // inputs for new nodes
 m2->add_req(NULL, n_toc);
 // operands for new nodes
-m2->_opnds[0] = new (C) iRegPdstOper(); // dst
+m2->_opnds[0] = new iRegPdstOper(); // dst
-m2->_opnds[1] = op_src;                 // src
+m2->_opnds[1] = op_src;             // src
-m2->_opnds[2] = new (C) iRegPdstOper(); // toc
+m2->_opnds[2] = new iRegPdstOper(); // toc
 // Register allocation for new nodes.
 ra_->set_pair(m2->_idx, ra_->get_reg_second(this), ra_->get_reg_first(this));
 nodes->push(m2);
 enc_class postalloc_expand_load_float_constant(regF dst, immF src, iRegLdst toc) %{
 bool large_constant_pool = true; // TODO: PPC port C->cfg()->_consts_size > 4000;
 MachNode *m2;
 if (large_constant_pool) {
-m2 = new (C) loadConFCompNode();
+m2 = new loadConFCompNode();
 } else {
-m2 = new (C) loadConFNode();
+m2 = new loadConFNode();
 }
 // inputs for new nodes
 m2->add_req(NULL, n_toc);
 // operands for new nodes
 m2->_opnds[0] = op_dst;
 m2->_opnds[1] = op_src;
-m2->_opnds[2] = new (C) iRegPdstOper(); // constanttablebase
+m2->_opnds[2] = new iRegPdstOper(); // constanttablebase
 // register allocation for new nodes
 ra_->set_pair(m2->_idx, ra_->get_reg_second(this), ra_->get_reg_first(this));
 nodes->push(m2);
 %}
 enc_class postalloc_expand_load_double_constant(regD dst, immD src, iRegLdst toc) %{
 bool large_constant_pool = true; // TODO: PPC port C->cfg()->_consts_size > 4000;
 MachNode *m2;
 if (large_constant_pool) {
-m2 = new (C) loadConDCompNode();
+m2 = new loadConDCompNode();
 } else {
-m2 = new (C) loadConDNode();
+m2 = new loadConDNode();
 }
 // inputs for new nodes
 m2->add_req(NULL, n_toc);
 // operands for new nodes
 m2->_opnds[0] = op_dst;
 m2->_opnds[1] = op_src;
-m2->_opnds[2] = new (C) iRegPdstOper(); // constanttablebase
+m2->_opnds[2] = new iRegPdstOper(); // constanttablebase
 // register allocation for new nodes
 ra_->set_pair(m2->_idx, ra_->get_reg_second(this), ra_->get_reg_first(this));
 nodes->push(m2);
 %}
 enc_class postalloc_expand_encode_oop(iRegNdst dst, iRegPdst src, flagsReg crx) %{
 if (VM_Version::has_isel()) {
 // use isel instruction with Power 7
-cmpP_reg_imm16Node *n_compare  = new (C) cmpP_reg_imm16Node();
+cmpP_reg_imm16Node *n_compare  = new cmpP_reg_imm16Node();
-encodeP_subNode    *n_sub_base = new (C) encodeP_subNode();
+encodeP_subNode    *n_sub_base = new encodeP_subNode();
-encodeP_shiftNode  *n_shift    = new (C) encodeP_shiftNode();
+encodeP_shiftNode  *n_shift    = new encodeP_shiftNode();
-cond_set_0_oopNode *n_cond_set = new (C) cond_set_0_oopNode();
+cond_set_0_oopNode *n_cond_set = new cond_set_0_oopNode();
 n_compare->add_req(n_region, n_src);
 n_compare->_opnds[0] = op_crx;
 n_compare->_opnds[1] = op_src;
-n_compare->_opnds[2] = new (C) immL16Oper(0);
+n_compare->_opnds[2] = new immL16Oper(0);
 n_sub_base->add_req(n_region, n_src);
 n_sub_base->_opnds[0] = op_dst;
 n_sub_base->_opnds[1] = op_src;
 n_sub_base->_bottom_type = _bottom_type;
 nodes->push(n_shift);
 nodes->push(n_cond_set);
 } else {
 // before Power 7
-moveRegNode        *n_move     = new (C) moveRegNode();
+moveRegNode        *n_move     = new moveRegNode();
-cmpP_reg_imm16Node *n_compare  = new (C) cmpP_reg_imm16Node();
+cmpP_reg_imm16Node *n_compare  = new cmpP_reg_imm16Node();
-encodeP_shiftNode  *n_shift    = new (C) encodeP_shiftNode();
+encodeP_shiftNode  *n_shift    = new encodeP_shiftNode();
-cond_sub_baseNode  *n_sub_base = new (C) cond_sub_baseNode();
+cond_sub_baseNode  *n_sub_base = new cond_sub_baseNode();
 n_move->add_req(n_region, n_src);
 n_move->_opnds[0] = op_dst;
 n_move->_opnds[1] = op_src;
 ra_->set_oop(n_move, true); // Until here, 'n_move' still produces an oop.
 n_compare->add_req(n_region, n_src);
 n_compare->add_prec(n_move);
 n_compare->_opnds[0] = op_crx;
 n_compare->_opnds[1] = op_src;
-n_compare->_opnds[2] = new (C) immL16Oper(0);
+n_compare->_opnds[2] = new immL16Oper(0);
 n_sub_base->add_req(n_region, n_compare, n_src);
 n_sub_base->_opnds[0] = op_dst;
 n_sub_base->_opnds[1] = op_crx;
 n_sub_base->_opnds[2] = op_src;
 assert(!(ra_->is_oop(this)), "sanity"); // This is not supposed to be GC'ed.
 %}
 enc_class postalloc_expand_encode_oop_not_null(iRegNdst dst, iRegPdst src) %{
-encodeP_subNode *n1 = new (C) encodeP_subNode();
+encodeP_subNode *n1 = new encodeP_subNode();
 n1->add_req(n_region, n_src);
 n1->_opnds[0] = op_dst;
 n1->_opnds[1] = op_src;
 n1->_bottom_type = _bottom_type;
-encodeP_shiftNode *n2 = new (C) encodeP_shiftNode();
+encodeP_shiftNode *n2 = new encodeP_shiftNode();
 n2->add_req(n_region, n1);
 n2->_opnds[0] = op_dst;
 n2->_opnds[1] = op_dst;
 n2->_bottom_type = _bottom_type;
 ra_->set_pair(n1->_idx, ra_->get_reg_second(this), ra_->get_reg_first(this));
 nodes->push(n2);
 assert(!(ra_->is_oop(this)), "sanity"); // This is not supposed to be GC'ed.
 %}
 enc_class postalloc_expand_decode_oop(iRegPdst dst, iRegNsrc src, flagsReg crx) %{
-decodeN_shiftNode *n_shift    = new (C) decodeN_shiftNode();
+decodeN_shiftNode *n_shift    = new decodeN_shiftNode();
-cmpN_reg_imm0Node *n_compare  = new (C) cmpN_reg_imm0Node();
+cmpN_reg_imm0Node *n_compare  = new cmpN_reg_imm0Node();
 n_compare->add_req(n_region, n_src);
 n_compare->_opnds[0] = op_crx;
 n_compare->_opnds[1] = op_src;
-n_compare->_opnds[2] = new (C) immN_0Oper(TypeNarrowOop::NULL_PTR);
+n_compare->_opnds[2] = new immN_0Oper(TypeNarrowOop::NULL_PTR);
 n_shift->add_req(n_region, n_src);
 n_shift->_opnds[0] = op_dst;
 n_shift->_opnds[1] = op_src;
 n_shift->_bottom_type = _bottom_type;
 if (VM_Version::has_isel()) {
 // use isel instruction with Power 7
-decodeN_addNode *n_add_base = new (C) decodeN_addNode();
+decodeN_addNode *n_add_base = new decodeN_addNode();
 n_add_base->add_req(n_region, n_shift);
 n_add_base->_opnds[0] = op_dst;
 n_add_base->_opnds[1] = op_dst;
 n_add_base->_bottom_type = _bottom_type;
-cond_set_0_ptrNode *n_cond_set = new (C) cond_set_0_ptrNode();
+cond_set_0_ptrNode *n_cond_set = new cond_set_0_ptrNode();
 n_cond_set->add_req(n_region, n_compare, n_add_base);
 n_cond_set->_opnds[0] = op_dst;
 n_cond_set->_opnds[1] = op_crx;
 n_cond_set->_opnds[2] = op_dst;
 n_cond_set->_bottom_type = _bottom_type;
 nodes->push(n_add_base);
 nodes->push(n_cond_set);
 } else {
 // before Power 7
-cond_add_baseNode *n_add_base = new (C) cond_add_baseNode();
+cond_add_baseNode *n_add_base = new cond_add_baseNode();
 n_add_base->add_req(n_region, n_compare, n_shift);
 n_add_base->_opnds[0] = op_dst;
 n_add_base->_opnds[1] = op_crx;
 n_add_base->_opnds[2] = op_dst;
 nodes->push(n_add_base);
 }
 %}
 enc_class postalloc_expand_decode_oop_not_null(iRegPdst dst, iRegNsrc src) %{
-decodeN_shiftNode *n1 = new (C) decodeN_shiftNode();
+decodeN_shiftNode *n1 = new decodeN_shiftNode();
 n1->add_req(n_region, n_src);
 n1->_opnds[0] = op_dst;
 n1->_opnds[1] = op_src;
 n1->_bottom_type = _bottom_type;
-decodeN_addNode *n2 = new (C) decodeN_addNode();
+decodeN_addNode *n2 = new decodeN_addNode();
 n2->add_req(n_region, n1);
 n2->_opnds[0] = op_dst;
 n2->_opnds[1] = op_dst;
 n2->_bottom_type = _bottom_type;
 ra_->set_pair(n1->_idx, ra_->get_reg_second(this), ra_->get_reg_first(this));
 // expand.
 enc_class postalloc_expand_load_replF_constant(iRegLdst dst, immF src, iRegLdst toc) %{
 // Create new nodes.
 // Make an operand with the bit pattern to load as float.
-immLOper *op_repl = new (C) immLOper((jlong)replicate_immF(op_src->constantF()));
+immLOper *op_repl = new immLOper((jlong)replicate_immF(op_src->constantF()));
 loadConLNodesTuple loadConLNodes =
 loadConLNodesTuple_create(C, ra_, n_toc, op_repl,
 ra_->get_reg_second(this), ra_->get_reg_first(this));
 // postalloc expand emitter for virtual calls.
 enc_class postalloc_expand_java_dynamic_call_sched(method meth, iRegLdst toc) %{
 // Create the nodes for loading the IC from the TOC.
 loadConLNodesTuple loadConLNodes_IC =
-loadConLNodesTuple_create(C, ra_, n_toc, new (C) immLOper((jlong)Universe::non_oop_word()),
+loadConLNodesTuple_create(C, ra_, n_toc, new immLOper((jlong)Universe::non_oop_word()),
 OptoReg::Name(R19_H_num), OptoReg::Name(R19_num));
 // Create the call node.
-CallDynamicJavaDirectSchedNode *call = new (C) CallDynamicJavaDirectSchedNode();
+CallDynamicJavaDirectSchedNode *call = new CallDynamicJavaDirectSchedNode();
 call->_method_handle_invoke = _method_handle_invoke;
 call->_vtable_index      = _vtable_index;
 call->_method            = _method;
 call->_bci               = _bci;
 call->_optimized_virtual = _optimized_virtual;
 enc_class postalloc_expand_java_to_runtime_call(method meth, iRegLdst toc) %{
 loadConLNodesTuple loadConLNodes_Entry;
 #if defined(ABI_ELFv2)
 jlong entry_address = (jlong) this->entry_point();
 assert(entry_address, "need address here");
-loadConLNodes_Entry = loadConLNodesTuple_create(C, ra_, n_toc, new (C) immLOper(entry_address),
+loadConLNodes_Entry = loadConLNodesTuple_create(C, ra_, n_toc, new immLOper(entry_address),
 OptoReg::Name(R12_H_num), OptoReg::Name(R12_num));
 #else
 // Get the struct that describes the function we are about to call.
 FunctionDescriptor* fd = (FunctionDescriptor*) this->entry_point();
 assert(fd, "need fd here");
 // new nodes
 loadConLNodesTuple loadConLNodes_Env;
 loadConLNodesTuple loadConLNodes_Toc;
 // Create nodes and operands for loading the entry point.
-loadConLNodes_Entry = loadConLNodesTuple_create(C, ra_, n_toc, new (C) immLOper(entry_address),
+loadConLNodes_Entry = loadConLNodesTuple_create(C, ra_, n_toc, new immLOper(entry_address),
 OptoReg::Name(R12_H_num), OptoReg::Name(R12_num));
 // Create nodes and operands for loading the env pointer.
 if (fd->env() != NULL) {
-loadConLNodes_Env = loadConLNodesTuple_create(C, ra_, n_toc, new (C) immLOper((jlong) fd->env()),
+loadConLNodes_Env = loadConLNodesTuple_create(C, ra_, n_toc, new immLOper((jlong) fd->env()),
 OptoReg::Name(R11_H_num), OptoReg::Name(R11_num));
 } else {
 loadConLNodes_Env._large_hi = NULL;
 loadConLNodes_Env._large_lo = NULL;
 loadConLNodes_Env._small    = NULL;
-loadConLNodes_Env._last = new (C) loadConL16Node();
+loadConLNodes_Env._last = new loadConL16Node();
-loadConLNodes_Env._last->_opnds[0] = new (C) iRegLdstOper();
+loadConLNodes_Env._last->_opnds[0] = new iRegLdstOper();
-loadConLNodes_Env._last->_opnds[1] = new (C) immL16Oper(0);
+loadConLNodes_Env._last->_opnds[1] = new immL16Oper(0);
 ra_->set_pair(loadConLNodes_Env._last->_idx, OptoReg::Name(R11_H_num), OptoReg::Name(R11_num));
 }
 // Create nodes and operands for loading the Toc point.
-loadConLNodes_Toc = loadConLNodesTuple_create(C, ra_, n_toc, new (C) immLOper((jlong) fd->toc()),
+loadConLNodes_Toc = loadConLNodesTuple_create(C, ra_, n_toc, new immLOper((jlong) fd->toc()),
 OptoReg::Name(R2_H_num), OptoReg::Name(R2_num));
 #endif // ABI_ELFv2
 // mtctr node
-MachNode *mtctr = new (C) CallLeafDirect_mtctrNode();
+MachNode *mtctr = new CallLeafDirect_mtctrNode();
 assert(loadConLNodes_Entry._last != NULL, "entry must exist");
 mtctr->add_req(0, loadConLNodes_Entry._last);
-mtctr->_opnds[0] = new (C) iRegLdstOper();
+mtctr->_opnds[0] = new iRegLdstOper();
-mtctr->_opnds[1] = new (C) iRegLdstOper();
+mtctr->_opnds[1] = new iRegLdstOper();
 // call node
-MachCallLeafNode *call = new (C) CallLeafDirectNode();
+MachCallLeafNode *call = new CallLeafDirectNode();
 call->_opnds[0] = _opnds[0];
-call->_opnds[1] = new (C) methodOper((intptr_t) entry_address); // May get set later.
+call->_opnds[1] = new methodOper((intptr_t) entry_address); // May get set later.
 // Make the new call node look like the old one.
 call->_name        = _name;
 call->_tf          = _tf;
 call->_entry_point = _entry_point;
 match(Set dst src);
 ins_cost(DEFAULT_COST*2);
 format %{ "LoadN   $dst, $src \t// postalloc expanded" %} // mask
 postalloc_expand %{
-MachNode *m1 = new (C) loadConN_hiNode();
+MachNode *m1 = new loadConN_hiNode();
-MachNode *m2 = new (C) loadConN_loNode();
+MachNode *m2 = new loadConN_loNode();
-MachNode *m3 = new (C) clearMs32bNode();
+MachNode *m3 = new clearMs32bNode();
 m1->add_req(NULL);
 m2->add_req(NULL, m1);
 m3->add_req(NULL, m2);
 m1->_opnds[0] = op_dst;
 m1->_opnds[1] = op_src;
 ins_cost(DEFAULT_COST*2);
 format %{ "LoadN   $dst, $src \t// postalloc expanded" %} // mask
 postalloc_expand %{
 // Load high bits into register. Sign extended.
-MachNode *m1 = new (C) loadConNKlass_hiNode();
+MachNode *m1 = new loadConNKlass_hiNode();
 m1->add_req(NULL);
 m1->_opnds[0] = op_dst;
 m1->_opnds[1] = op_src;
 ra_->set_pair(m1->_idx, ra_->get_reg_second(this), ra_->get_reg_first(this));
 nodes->push(m1);
 MachNode *m2 = m1;
 if (!Assembler::is_uimm((jlong)Klass::encode_klass((Klass *)op_src->constant()), 31)) {
 // Value might be 1-extended. Mask out these bits.
-m2 = new (C) clearMs32bNode();
+m2 = new clearMs32bNode();
 m2->add_req(NULL, m1);
 m2->_opnds[0] = op_dst;
 m2->_opnds[1] = op_dst;
 ra_->set_pair(m2->_idx, ra_->get_reg_second(this), ra_->get_reg_first(this));
 nodes->push(m2);
 }
-MachNode *m3 = new (C) loadConNKlass_loNode();
+MachNode *m3 = new loadConNKlass_loNode();
 m3->add_req(NULL, m2);
 m3->_opnds[0] = op_dst;
 m3->_opnds[1] = op_src;
 m3->_opnds[2] = op_dst;
 ra_->set_pair(m3->_idx, ra_->get_reg_second(this), ra_->get_reg_first(this));
 match(Set dst (EncodePKlass (Binary base src)));
 predicate(false);
 format %{ "EncodePKlass $dst, $src\t// $src != Null, postalloc expanded" %}
 postalloc_expand %{
-encodePKlass_sub_baseNode *n1 = new (C) encodePKlass_sub_baseNode();
+encodePKlass_sub_baseNode *n1 = new encodePKlass_sub_baseNode();
 n1->add_req(n_region, n_base, n_src);
 n1->_opnds[0] = op_dst;
 n1->_opnds[1] = op_base;
 n1->_opnds[2] = op_src;
 n1->_bottom_type = _bottom_type;
-encodePKlass_shiftNode *n2 = new (C) encodePKlass_shiftNode();
+encodePKlass_shiftNode *n2 = new encodePKlass_shiftNode();
 n2->add_req(n_region, n1);
 n2->_opnds[0] = op_dst;
 n2->_opnds[1] = op_dst;
 n2->_bottom_type = _bottom_type;
 ra_->set_pair(n1->_idx, ra_->get_reg_second(this), ra_->get_reg_first(this));
 //effect(kill src); // We need a register for the immediate result after shifting.
 predicate(false);
 format %{ "DecodeNKlass $dst =  $base + ($src << 3) \t// $src != NULL, postalloc expanded" %}
 postalloc_expand %{
-decodeNKlass_add_baseNode *n1 = new (C) decodeNKlass_add_baseNode();
+decodeNKlass_add_baseNode *n1 = new decodeNKlass_add_baseNode();
 n1->add_req(n_region, n_base, n_src);
 n1->_opnds[0] = op_dst;
 n1->_opnds[1] = op_base;
 n1->_opnds[2] = op_src;
 n1->_bottom_type = _bottom_type;
-decodeNKlass_shiftNode *n2 = new (C) decodeNKlass_shiftNode();
+decodeNKlass_shiftNode *n2 = new decodeNKlass_shiftNode();
 n2->add_req(n_region, n1);
 n2->_opnds[0] = op_dst;
 n2->_opnds[1] = op_dst;
 n2->_bottom_type = _bottom_type;
 //      |   \       |    |    /
 //      dst=cmovI_bso_stackSlotL
 //
 // Create new nodes.
-MachNode *m1 = new (C) loadConI16Node();
+MachNode *m1 = new loadConI16Node();
-MachNode *m2 = new (C) cmovI_bso_stackSlotLNode();
+MachNode *m2 = new cmovI_bso_stackSlotLNode();
 // inputs for new nodes
 m1->add_req(n_region);
 m2->add_req(n_region, n_crx, n_mem);
 // precedences for new nodes
 m2->add_prec(m1);
 // operands for new nodes
 m1->_opnds[0] = op_dst;
-m1->_opnds[1] = new (C) immI16Oper(0);
+m1->_opnds[1] = new immI16Oper(0);
 m2->_opnds[0] = op_dst;
 m2->_opnds[1] = op_crx;
 m2->_opnds[2] = op_mem;
 //      |   \       |    |    /
 //      dst=cmovL_bso_stackSlotL
 //
 // Create new nodes.
-MachNode *m1 = new (C) loadConL16Node();
+MachNode *m1 = new loadConL16Node();
-MachNode *m2 = new (C) cmovL_bso_stackSlotLNode();
+MachNode *m2 = new cmovL_bso_stackSlotLNode();
 // inputs for new nodes
 m1->add_req(n_region);
 m2->add_req(n_region, n_crx, n_mem);
 m2->add_prec(m1);
 // operands for new nodes
 m1->_opnds[0] = op_dst;
-m1->_opnds[1] = new (C) immL16Oper(0);
+m1->_opnds[1] = new immL16Oper(0);
 m2->_opnds[0] = op_dst;
 m2->_opnds[1] = op_crx;
 m2->_opnds[2] = op_mem;
 // registers for new nodes
 //      |   \       |
 //      dst=cmovI_conIvalueMinus1_conIvalue1
 //
 // Create new nodes.
-MachNode *m1 = new (C) loadConI16Node();
+MachNode *m1 = new loadConI16Node();
-MachNode *m2 = new (C) cmovI_conIvalueMinus1_conIvalue1Node();
+MachNode *m2 = new cmovI_conIvalueMinus1_conIvalue1Node();
 // inputs for new nodes
 m1->add_req(n_region);
 m2->add_req(n_region, n_crx);
 m2->add_prec(m1);
 // operands for new nodes
 m1->_opnds[0] = op_dst;
-m1->_opnds[1] = new (C) immI16Oper(0);
+m1->_opnds[1] = new immI16Oper(0);
 m2->_opnds[0] = op_dst;
 m2->_opnds[1] = op_crx;
 // registers for new nodes
 ra_->set_pair(m1->_idx, ra_->get_reg_second(this), ra_->get_reg_first(this)); // dst
 //      |   \
 //      crx=cmov_bns_less
 //
 // Create new nodes.
-MachNode *m1 = new (C) cmpFUnordered_reg_regNode();
+MachNode *m1 = new cmpFUnordered_reg_regNode();
-MachNode *m2 = new (C) cmov_bns_lessNode();
+MachNode *m2 = new cmov_bns_lessNode();
 // inputs for new nodes
 m1->add_req(n_region, n_src1, n_src2);
 m2->add_req(n_region);
 m2->add_prec(m1);
 //      |   \
 //      crx=cmov_bns_less
 //
 // create new nodes
-MachNode *m1 = new (C) cmpDUnordered_reg_regNode();
+MachNode *m1 = new cmpDUnordered_reg_regNode();
-MachNode *m2 = new (C) cmov_bns_lessNode();
+MachNode *m2 = new cmov_bns_lessNode();
 // inputs for new nodes
 m1->add_req(n_region, n_src1, n_src2);
 m2->add_req(n_region);
 m2->add_prec(m1);

changeset 24923	9631f7d691dc
parent 24349	d8f40e5b392d
child 25374	d7fb2af5d53c