equal
deleted
inserted
replaced
978 |
978 |
979 if (FLAG_IS_DEFAULT(ContendedPaddingWidth) && |
979 if (FLAG_IS_DEFAULT(ContendedPaddingWidth) && |
980 (cache_line_size > ContendedPaddingWidth)) |
980 (cache_line_size > ContendedPaddingWidth)) |
981 ContendedPaddingWidth = cache_line_size; |
981 ContendedPaddingWidth = cache_line_size; |
982 |
982 |
|
983 // This machine allows unaligned memory accesses |
|
984 if (FLAG_IS_DEFAULT(UseUnalignedAccesses)) { |
|
985 FLAG_SET_DEFAULT(UseUnalignedAccesses, true); |
|
986 } |
|
987 |
983 #ifndef PRODUCT |
988 #ifndef PRODUCT |
984 if (PrintMiscellaneous && Verbose) { |
989 if (PrintMiscellaneous && Verbose) { |
985 tty->print_cr("Logical CPUs per core: %u", |
990 tty->print_cr("Logical CPUs per core: %u", |
986 logical_processors_per_package()); |
991 logical_processors_per_package()); |
987 tty->print_cr("L1 data cache line size: %u", L1_data_cache_line_size()); |
992 tty->print_cr("L1 data cache line size: %u", L1_data_cache_line_size()); |