hotspot/src/cpu/aarch64/vm/interp_masm_aarch64.cpp
changeset 42582 8a46057442cd
parent 41302 19eeea7ed66e
child 43439 5e03c9ba74f3
equal deleted inserted replaced
42581:2fdb039ea5b5 42582:8a46057442cd
   405   if (JvmtiExport::can_post_interpreter_events()) {
   405   if (JvmtiExport::can_post_interpreter_events()) {
   406     Label run_compiled_code;
   406     Label run_compiled_code;
   407     // JVMTI events, such as single-stepping, are implemented partly by avoiding running
   407     // JVMTI events, such as single-stepping, are implemented partly by avoiding running
   408     // compiled code in threads for which the event is enabled.  Check here for
   408     // compiled code in threads for which the event is enabled.  Check here for
   409     // interp_only_mode if these events CAN be enabled.
   409     // interp_only_mode if these events CAN be enabled.
   410     // interp_only is an int, on little endian it is sufficient to test the byte only
   410     ldrw(rscratch1, Address(rthread, JavaThread::interp_only_mode_offset()));
   411     // Is a cmpl faster?
   411     cbzw(rscratch1, run_compiled_code);
   412     ldr(rscratch1, Address(rthread, JavaThread::interp_only_mode_offset()));
       
   413     cbz(rscratch1, run_compiled_code);
       
   414     ldr(rscratch1, Address(method, Method::interpreter_entry_offset()));
   412     ldr(rscratch1, Address(method, Method::interpreter_entry_offset()));
   415     br(rscratch1);
   413     br(rscratch1);
   416     bind(run_compiled_code);
   414     bind(run_compiled_code);
   417   }
   415   }
   418 
   416