src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.asm.aarch64/src/org/graalvm/compiler/asm/aarch64/AArch64Assembler.java
changeset 54084 84f10bbf993f
parent 52910 583fd71c47d6
child 54328 37648a9c4a6a
equal deleted inserted replaced
54083:d9bcf74fc56a 54084:84f10bbf993f
   878      * @param pos Position at which instruction is inserted into buffer. -1 means insert at end.
   878      * @param pos Position at which instruction is inserted into buffer. -1 means insert at end.
   879      */
   879      */
   880     protected void tbnz(Register reg, int uimm6, int imm16, int pos) {
   880     protected void tbnz(Register reg, int uimm6, int imm16, int pos) {
   881         assert reg.getRegisterCategory().equals(CPU);
   881         assert reg.getRegisterCategory().equals(CPU);
   882         assert NumUtil.isUnsignedNbit(6, uimm6);
   882         assert NumUtil.isUnsignedNbit(6, uimm6);
   883         assert NumUtil.isSignedNbit(18, imm16);
   883         assert NumUtil.isSignedNbit(16, imm16) : String.format("Offset value must fit in 16 bits signed: 0x%x", imm16);
   884         assert (imm16 & 3) == 0;
   884         assert (imm16 & 3) == 0 : String.format("Lower two bits must be zero: 0x%x", imm16 & 3);
   885         // size bit is overloaded as top bit of uimm6 bit index
   885         // size bit is overloaded as top bit of uimm6 bit index
   886         int size = (((uimm6 >> 5) & 1) == 0 ? 32 : 64);
   886         int size = (((uimm6 >> 5) & 1) == 0 ? 32 : 64);
   887         // remaining 5 bits are encoded lower down
   887         // remaining 5 bits are encoded lower down
   888         int uimm5 = uimm6 >> 1;
   888         int uimm5 = uimm6 & 0x1F;
   889         int offset = (imm16 & NumUtil.getNbitNumberInt(16)) >> 2;
   889         int imm14 = (imm16 & NumUtil.getNbitNumberInt(16)) >> 2;
   890         InstructionType type = generalFromSize(size);
   890         InstructionType type = generalFromSize(size);
   891         int encoding = type.encoding | TBNZ.encoding | (uimm5 << 19) | (offset << 5) | rd(reg);
   891         int encoding = type.encoding | TBNZ.encoding | (uimm5 << 19) | (imm14 << 5) | rd(reg);
   892         if (pos == -1) {
   892         if (pos == -1) {
   893             emitInt(encoding);
   893             emitInt(encoding);
   894         } else {
   894         } else {
   895             emitInt(encoding, pos);
   895             emitInt(encoding, pos);
   896         }
   896         }
   905      * @param pos Position at which instruction is inserted into buffer. -1 means insert at end.
   905      * @param pos Position at which instruction is inserted into buffer. -1 means insert at end.
   906      */
   906      */
   907     protected void tbz(Register reg, int uimm6, int imm16, int pos) {
   907     protected void tbz(Register reg, int uimm6, int imm16, int pos) {
   908         assert reg.getRegisterCategory().equals(CPU);
   908         assert reg.getRegisterCategory().equals(CPU);
   909         assert NumUtil.isUnsignedNbit(6, uimm6);
   909         assert NumUtil.isUnsignedNbit(6, uimm6);
   910         assert NumUtil.isSignedNbit(18, imm16);
   910         assert NumUtil.isSignedNbit(16, imm16) : String.format("Offset value must fit in 16 bits signed: 0x%x", imm16);
   911         assert (imm16 & 3) == 0;
   911         assert (imm16 & 3) == 0 : String.format("Lower two bits must be zero: 0x%x", imm16 & 3);
   912         // size bit is overloaded as top bit of uimm6 bit index
   912         // size bit is overloaded as top bit of uimm6 bit index
   913         int size = (((uimm6 >> 5) & 1) == 0 ? 32 : 64);
   913         int size = (((uimm6 >> 5) & 1) == 0 ? 32 : 64);
   914         // remaining 5 bits are encoded lower down
   914         // remaining 5 bits are encoded lower down
   915         int uimm5 = uimm6 >> 1;
   915         int uimm5 = uimm6 & 0x1F;
   916         int offset = (imm16 & NumUtil.getNbitNumberInt(16)) >> 2;
   916         int imm14 = (imm16 & NumUtil.getNbitNumberInt(16)) >> 2;
   917         InstructionType type = generalFromSize(size);
   917         InstructionType type = generalFromSize(size);
   918         int encoding = type.encoding | TBZ.encoding | (uimm5 << 19) | (offset << 5) | rd(reg);
   918         int encoding = type.encoding | TBZ.encoding | (uimm5 << 19) | (imm14 << 5) | rd(reg);
   919         if (pos == -1) {
   919         if (pos == -1) {
   920             emitInt(encoding);
   920             emitInt(encoding);
   921         } else {
   921         } else {
   922             emitInt(encoding, pos);
   922             emitInt(encoding, pos);
   923         }
   923         }