jdk-sandbox: comparison src/hotspot/cpu/ppc/ppc.ad

equal deleted inserted replaced

-:689ebcfe04fd
+:848864ed9b17
 if (entry_point_toc_addr == NULL) {
 ciEnv::current()->record_out_of_memory_failure();
 return offsets;
 }
 const int     entry_point_toc_offset = __ offset_to_method_toc(entry_point_toc_addr);
 // Emit the trampoline stub which will be related to the branch-and-link below.
 CallStubImpl::emit_trampoline_stub(_masm, entry_point_toc_offset, offsets.insts_call_instruction_offset);
 if (ciEnv::current()->failing()) { return offsets; } // Code cache may be full.
 __ relocate(rtype);
 // Note: At this point we do not have the address of the trampoline
 // stub, and the entry point might be too far away for bl, so __ pc()
 // serves as dummy and the bl will be patched later.
 __ bl((address) __ pc());
 #endif
 if (!method_is_frameless) {
 // Save return pc.
 ___(std) std(return_pc, _abi(lr), callers_sp);
 }
 C->set_frame_complete(cbuf.insts_size());
 }
 #undef ___
 #undef ___stop
 #undef ___advance
 const_toc_addr = __ long_constant((jlong)$src$$constant);
 if (const_toc_addr == NULL) {
 ciEnv::current()->record_out_of_memory_failure();
 return;
 }
 // Get the constant's TOC offset.
 toc_offset = __ offset_to_method_toc(const_toc_addr);
 // Keep the current instruction offset in mind.
 ((loadConLNode*)this)->_cbuf_insts_offset = __ offset();
 __ ld($dst$$Register, toc_offset, $toc$$Register);
 %}
 enc_class enc_load_long_constL_hi(iRegLdst dst, iRegLdst toc, immL src) %{
 // TODO: PPC port $archOpcode(ppc64Opcode_addis);
 xxspltdNode     *_replicated;
 loadConLNode    *_small;
 MachNode        *_last;
 } loadConLReplicatedNodesTuple;
 loadConLReplicatedNodesTuple loadConLReplicatedNodesTuple_create(Compile *C, PhaseRegAlloc *ra_, Node *toc, immLOper *immSrc,
 vecXOper *dst, immI_0Oper *zero,
 OptoReg::Name reg_second, OptoReg::Name reg_first,
 OptoReg::Name reg_vec_second, OptoReg::Name reg_vec_first) {
 loadConLReplicatedNodesTuple nodes;
 MacroAssembler _masm(&cbuf);
 Label skip_storestore;
 #if 0 // TODO: PPC port
-// Check CMSCollectorCardTableModRefBSExt::_requires_release and do the
+// Check CMSCollectorCardTableBarrierSetBSExt::_requires_release and do the
 // StoreStore barrier conditionally.
 __ lwz(R0, 0, $releaseFieldAddr$$Register);
 __ cmpwi($crx$$CondRegister, R0, 0);
 __ beq_predict_taken($crx$$CondRegister, skip_storestore);
 #endif
 //----------Store Instructions With Zeros--------------------------------------
 // Card-mark for CMS garbage collection.
 // This cardmark does an optimization so that it must not always
 // do a releasing store. For this, it gets the address of
-// CMSCollectorCardTableModRefBSExt::_requires_release as input.
+// CMSCollectorCardTableBarrierSetBSExt::_requires_release as input.
 // (Using releaseFieldAddr in the match rule is a hack.)
 instruct storeCM_CMS(memory mem, iRegLdst releaseFieldAddr, flagsReg crx) %{
 match(Set mem (StoreCM mem releaseFieldAddr));
 effect(TEMP crx);
 predicate(false);
 %}
 // Card-mark for CMS garbage collection.
 // This cardmark does an optimization so that it must not always
 // do a releasing store. For this, it needs the constant address of
-// CMSCollectorCardTableModRefBSExt::_requires_release.
+// CMSCollectorCardTableBarrierSetBSExt::_requires_release.
 // This constant address is split off here by expand so we can use
 // adlc / matcher functionality to load it from the constant section.
 instruct storeCM_CMS_ExEx(memory mem, immI_0 zero) %{
 match(Set mem (StoreCM mem zero));
 predicate(UseConcMarkSweepGC);
 expand %{
-immL baseImm %{ 0 /* TODO: PPC port (jlong)CMSCollectorCardTableModRefBSExt::requires_release_address() */ %}
+immL baseImm %{ 0 /* TODO: PPC port (jlong)CMSCollectorCardTableBarrierSetBSExt::requires_release_address() */ %}
 iRegLdst releaseFieldAddress;
 flagsReg crx;
 loadConL_Ex(releaseFieldAddress, baseImm);
 storeCM_CMS(mem, releaseFieldAddress, crx);
 %}
 ins_pipe(pipe_class_default);
 %}
 instruct mtvsrwz(vecX temp1, iRegIsrc src) %{
 effect(DEF temp1, USE src);
 size(4);
 ins_encode %{
 __ mtvsrwz($temp1$$VectorSRegister, $src$$Register);
 %}
 ins_pipe(pipe_class_default);
 instruct xxspltw(vecX dst, vecX src, immI8 imm1) %{
 effect(DEF dst, USE src, USE imm1);
 size(4);
 ins_encode %{
 __ xxspltw($dst$$VectorSRegister, $src$$VectorSRegister, $imm1$$constant);
 %}
 ins_pipe(pipe_class_default);
 %}
 //---------- Replicate Vector Instructions ------------------------------------
 predicate(n->as_Vector()->length() == 8);
 expand %{
 iRegLdst tmpL;
 vecX tmpV;
 immI8  zero %{ (int)  0 %}
 moveReg(tmpL, src);
 repl48(tmpL);
 repl32(tmpL);
 mtvsrd(tmpV, tmpL);
 xxpermdi(dst, tmpV, tmpV, zero);
 instruct repl4I_reg_Ex(vecX dst, iRegIsrc src) %{
 match(Set dst (ReplicateI src));
 predicate(n->as_Vector()->length() == 4);
 ins_cost(2 * DEFAULT_COST);
 expand %{
 iRegLdst tmpL;
 vecX tmpV;
 immI8  zero %{ (int)  0 %}
 moveReg(tmpL, src);
 repl32(tmpL);
 mtvsrd(tmpV, tmpL);
 xxpermdi(dst, tmpV, tmpV, zero);
 %}
 expand %{
 stackSlotL tmpS;
 iRegIdst tmpI;
 iRegLdst tmpL;
 vecX tmpV;
 immI8  zero %{ (int)  0 %}
 moveF2I_reg_stack(tmpS, src);   // Move float to stack.
 moveF2I_stack_reg(tmpI, tmpS);  // Move stack to int reg.
 moveReg(tmpL, tmpI);             // Move int to long reg.
 repl32(tmpL);                    // Replicate bitpattern.
 expand %{
 stackSlotL tmpS;
 iRegLdst tmpL;
 iRegLdst tmp;
 vecX tmpV;
 immI8  zero %{ (int)  0 %}
 moveD2L_reg_stack(tmpS, src);
 moveD2L_stack_reg(tmpL, tmpS);
 mtvsrd(tmpV, tmpL);
 xxpermdi(dst, tmpV, tmpV, zero);
 %}
 instruct mtvsrd(vecX dst, iRegLsrc src) %{
 predicate(false);
 effect(DEF dst, USE src);
 format %{ "MTVSRD      $dst, $src \t// Move to 16-byte register"%}
 size(4);
 ins_encode %{
 __ mtvsrd($dst$$VectorSRegister, $src$$Register);
 %}
 ins_pipe(pipe_class_default);
 format %{ "XXSPLATD      $dst, $src, $zero \t// Permute 16-byte register"%}
 size(4);
 ins_encode %{
 __ xxpermdi($dst$$VectorSRegister, $src$$VectorSRegister, $src$$VectorSRegister, $zero$$constant);
 %}
 ins_pipe(pipe_class_default);
 %}
 instruct xxpermdi(vecX dst, vecX src1, vecX src2, immI8 zero) %{
 effect(DEF dst, USE src1, USE src2, USE zero);
 format %{ "XXPERMDI      $dst, $src1, $src2, $zero \t// Permute 16-byte register"%}
 size(4);
 ins_encode %{
 __ xxpermdi($dst$$VectorSRegister, $src1$$VectorSRegister, $src2$$VectorSRegister, $zero$$constant);
 %}
 ins_pipe(pipe_class_default);
 %}
 instruct repl2L_reg_Ex(vecX dst, iRegLsrc src) %{
 match(Set dst (ReplicateL src));
 predicate(n->as_Vector()->length() == 2);
 expand %{
 vecX tmpV;
 immI8  zero %{ (int)  0 %}
 mtvsrd(tmpV, src);
 xxpermdi(dst, tmpV, tmpV, zero);
 %}
 %}
 instruct repl2L_immI0(vecX dst, immI_0 zero) %{

changeset 49455	848864ed9b17
parent 48810	1f7ebe9dd5b2
child 50095	bf2f27b92064