6362 postalloc_expand( postalloc_expand_load_double_constant(dst, src, constanttablebase) ); |
6362 postalloc_expand( postalloc_expand_load_double_constant(dst, src, constanttablebase) ); |
6363 %} |
6363 %} |
6364 |
6364 |
6365 // Prefetch instructions. |
6365 // Prefetch instructions. |
6366 // Must be safe to execute with invalid address (cannot fault). |
6366 // Must be safe to execute with invalid address (cannot fault). |
6367 |
|
6368 instruct prefetchr(indirectMemory mem, iRegLsrc src) %{ |
|
6369 match(PrefetchRead (AddP mem src)); |
|
6370 ins_cost(MEMORY_REF_COST); |
|
6371 |
|
6372 format %{ "PREFETCH $mem, 0, $src \t// Prefetch read-many" %} |
|
6373 size(4); |
|
6374 ins_encode %{ |
|
6375 // TODO: PPC port $archOpcode(ppc64Opcode_dcbt); |
|
6376 __ dcbt($src$$Register, $mem$$base$$Register); |
|
6377 %} |
|
6378 ins_pipe(pipe_class_memory); |
|
6379 %} |
|
6380 |
|
6381 instruct prefetchr_no_offset(indirectMemory mem) %{ |
|
6382 match(PrefetchRead mem); |
|
6383 ins_cost(MEMORY_REF_COST); |
|
6384 |
|
6385 format %{ "PREFETCH $mem" %} |
|
6386 size(4); |
|
6387 ins_encode %{ |
|
6388 // TODO: PPC port $archOpcode(ppc64Opcode_dcbt); |
|
6389 __ dcbt($mem$$base$$Register); |
|
6390 %} |
|
6391 ins_pipe(pipe_class_memory); |
|
6392 %} |
|
6393 |
|
6394 instruct prefetchw(indirectMemory mem, iRegLsrc src) %{ |
|
6395 match(PrefetchWrite (AddP mem src)); |
|
6396 ins_cost(MEMORY_REF_COST); |
|
6397 |
|
6398 format %{ "PREFETCH $mem, 2, $src \t// Prefetch write-many (and read)" %} |
|
6399 size(4); |
|
6400 ins_encode %{ |
|
6401 // TODO: PPC port $archOpcode(ppc64Opcode_dcbtst); |
|
6402 __ dcbtst($src$$Register, $mem$$base$$Register); |
|
6403 %} |
|
6404 ins_pipe(pipe_class_memory); |
|
6405 %} |
|
6406 |
|
6407 instruct prefetchw_no_offset(indirectMemory mem) %{ |
|
6408 match(PrefetchWrite mem); |
|
6409 ins_cost(MEMORY_REF_COST); |
|
6410 |
|
6411 format %{ "PREFETCH $mem" %} |
|
6412 size(4); |
|
6413 ins_encode %{ |
|
6414 // TODO: PPC port $archOpcode(ppc64Opcode_dcbtst); |
|
6415 __ dcbtst($mem$$base$$Register); |
|
6416 %} |
|
6417 ins_pipe(pipe_class_memory); |
|
6418 %} |
|
6419 |
6367 |
6420 // Special prefetch versions which use the dcbz instruction. |
6368 // Special prefetch versions which use the dcbz instruction. |
6421 instruct prefetch_alloc_zero(indirectMemory mem, iRegLsrc src) %{ |
6369 instruct prefetch_alloc_zero(indirectMemory mem, iRegLsrc src) %{ |
6422 match(PrefetchAllocation (AddP mem src)); |
6370 match(PrefetchAllocation (AddP mem src)); |
6423 predicate(AllocatePrefetchStyle == 3); |
6371 predicate(AllocatePrefetchStyle == 3); |