197 |
197 |
198 // Get low bit; check for being the only bit |
198 // Get low bit; check for being the only bit |
199 Node *res = NULL; |
199 Node *res = NULL; |
200 unsigned int bit1 = abs_con & (0-abs_con); // Extract low bit |
200 unsigned int bit1 = abs_con & (0-abs_con); // Extract low bit |
201 if (bit1 == abs_con) { // Found a power of 2? |
201 if (bit1 == abs_con) { // Found a power of 2? |
202 res = new LShiftINode(in(1), phase->intcon(log2_intptr(bit1))); |
202 res = new LShiftINode(in(1), phase->intcon(log2_uint(bit1))); |
203 } else { |
203 } else { |
204 |
204 |
205 // Check for constant with 2 bits set |
205 // Check for constant with 2 bits set |
206 unsigned int bit2 = abs_con-bit1; |
206 unsigned int bit2 = abs_con-bit1; |
207 bit2 = bit2 & (0-bit2); // Extract 2nd bit |
207 bit2 = bit2 & (0-bit2); // Extract 2nd bit |
208 if (bit2 + bit1 == abs_con) { // Found all bits in con? |
208 if (bit2 + bit1 == abs_con) { // Found all bits in con? |
209 Node *n1 = phase->transform( new LShiftINode(in(1), phase->intcon(log2_intptr(bit1)))); |
209 Node *n1 = phase->transform( new LShiftINode(in(1), phase->intcon(log2_uint(bit1)))); |
210 Node *n2 = phase->transform( new LShiftINode(in(1), phase->intcon(log2_intptr(bit2)))); |
210 Node *n2 = phase->transform( new LShiftINode(in(1), phase->intcon(log2_uint(bit2)))); |
211 res = new AddINode(n2, n1); |
211 res = new AddINode(n2, n1); |
212 |
212 |
213 } else if (is_power_of_2(abs_con+1)) { |
213 } else if (is_power_of_2(abs_con+1)) { |
214 // Sleezy: power-of-2 -1. Next time be generic. |
214 // Sleezy: power-of-2 -1. Next time be generic. |
215 unsigned int temp = abs_con + 1; |
215 unsigned int temp = abs_con + 1; |
216 Node *n1 = phase->transform(new LShiftINode(in(1), phase->intcon(log2_intptr(temp)))); |
216 Node *n1 = phase->transform(new LShiftINode(in(1), phase->intcon(log2_uint(temp)))); |
217 res = new SubINode(n1, in(1)); |
217 res = new SubINode(n1, in(1)); |
218 } else { |
218 } else { |
219 return MulNode::Ideal(phase, can_reshape); |
219 return MulNode::Ideal(phase, can_reshape); |
220 } |
220 } |
221 } |
221 } |
443 if (t2 && t2->is_con()) { |
443 if (t2 && t2->is_con()) { |
444 int con = t2->get_con(); |
444 int con = t2->get_con(); |
445 // Masking off high bits which are always zero is useless. |
445 // Masking off high bits which are always zero is useless. |
446 const TypeInt* t1 = phase->type( in(1) )->isa_int(); |
446 const TypeInt* t1 = phase->type( in(1) )->isa_int(); |
447 if (t1 != NULL && t1->_lo >= 0) { |
447 if (t1 != NULL && t1->_lo >= 0) { |
448 jint t1_support = right_n_bits(1 + log2_intptr(t1->_hi)); |
448 jint t1_support = right_n_bits(1 + log2_jint(t1->_hi)); |
449 if ((t1_support & con) == t1_support) |
449 if ((t1_support & con) == t1_support) |
450 return in1; |
450 return in1; |
451 } |
451 } |
452 // Masking off the high bits of a unsigned-shift-right is not |
452 // Masking off the high bits of a unsigned-shift-right is not |
453 // needed either. |
453 // needed either. |