hotspot/src/cpu/x86/vm/globalDefinitions_x86.hpp
changeset 27165 785a8d56024c
parent 22872 b6902ee5bc8d
child 30221 70dab4a0cd45
equal deleted inserted replaced
27164:6523fa019ffa 27165:785a8d56024c
     1 /*
     1 /*
     2  * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
     2  * Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved.
     3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
     3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
     4  *
     4  *
     5  * This code is free software; you can redistribute it and/or modify it
     5  * This code is free software; you can redistribute it and/or modify it
     6  * under the terms of the GNU General Public License version 2 only, as
     6  * under the terms of the GNU General Public License version 2 only, as
     7  * published by the Free Software Foundation.
     7  * published by the Free Software Foundation.
    33 // signatures accordingly.
    33 // signatures accordingly.
    34 const bool CCallingConventionRequiresIntsAsLongs = false;
    34 const bool CCallingConventionRequiresIntsAsLongs = false;
    35 
    35 
    36 #define SUPPORTS_NATIVE_CX8
    36 #define SUPPORTS_NATIVE_CX8
    37 
    37 
       
    38 // The expected size in bytes of a cache line, used to pad data structures.
       
    39 #if defined(TIERED)
       
    40   #ifdef _LP64
       
    41     // tiered, 64-bit, large machine
       
    42     #define DEFAULT_CACHE_LINE_SIZE 128
       
    43   #else
       
    44     // tiered, 32-bit, medium machine
       
    45     #define DEFAULT_CACHE_LINE_SIZE 64
       
    46   #endif
       
    47 #elif defined(COMPILER1)
       
    48   // pure C1, 32-bit, small machine
       
    49   // i486 was the last Intel chip with 16-byte cache line size
       
    50   #define DEFAULT_CACHE_LINE_SIZE 32
       
    51 #elif defined(COMPILER2) || defined(SHARK)
       
    52   #ifdef _LP64
       
    53     // pure C2, 64-bit, large machine
       
    54     #define DEFAULT_CACHE_LINE_SIZE 128
       
    55   #else
       
    56     // pure C2, 32-bit, medium machine
       
    57     #define DEFAULT_CACHE_LINE_SIZE 64
       
    58   #endif
       
    59 #endif
       
    60 
    38 #endif // CPU_X86_VM_GLOBALDEFINITIONS_X86_HPP
    61 #endif // CPU_X86_VM_GLOBALDEFINITIONS_X86_HPP