jdk-sandbox: comparison hotspot/src/share/vm/opto/chaitin.cpp

equal deleted inserted replaced

-:95cc0162a92d
+:7819ffdaf0ff
 assert(_cfg.get_block_for_node(proj) == borig, "incorrect block for kill projections");
 found_projs++;
 // Copy kill projections after the cloned node
 Node* kills = proj->clone();
 kills->set_req(0, copy);
-b->_nodes.insert(idx++, kills);
+b->insert_node(kills, idx++);
 _cfg.map_node_to_block(kills, b);
 new_lrg(kills, max_lrg_id++);
 }
 }
 return found_projs;
 // get allocated, but instead rely on correct scheduling to ensure that
 // only one instance is simultaneously live at a time.
 uint lr_counter = 1;
 for( uint i = 0; i < _cfg.number_of_blocks(); i++ ) {
 Block* block = _cfg.get_block(i);
-uint cnt = block->_nodes.size();
+uint cnt = block->number_of_nodes();
 // Handle all the normal Nodes in the block
 for( uint j = 0; j < cnt; j++ ) {
-Node *n = block->_nodes[j];
+Node *n = block->get_node(j);
 // Pre-color to the zero live range, or pick virtual register
 const RegMask &rm = n->out_RegMask();
 _lrg_map.map(n->_idx, rm.is_NotEmpty() ? lr_counter++ : 0);
 }
 }
 // For all blocks
 for (uint i = 0; i < _cfg.number_of_blocks(); i++) {
 Block* block = _cfg.get_block(i);
 // For all instructions
-for (uint j = 1; j < block->_nodes.size(); j++) {
+for (uint j = 1; j < block->number_of_nodes(); j++) {
-Node* n = block->_nodes[j];
+Node* n = block->get_node(j);
 uint input_edge_start =1; // Skip control most nodes
 if (n->is_Mach()) {
 input_edge_start = n->as_Mach()->oper_input_base();
 }
 uint idx = n->is_Copy();
 Block* block = _cfg.get_block(i);
 // For all instructions in block
 uint last_inst = block->end_idx();
 for (uint j = 1; j <= last_inst; j++) {
-Node* n = block->_nodes[j];
+Node* n = block->get_node(j);
 // Dead instruction???
 assert( n->outcnt() != 0 ||// Nothing dead after post alloc
 C->top() == n ||  // Or the random TOP node
 n->is_Proj(),     // Or a fat-proj kill node
 cisc->set_req(inp,fp);          // Base register is frame pointer
 if( cisc->oper_input_base() > 1 && mach->oper_input_base() <= 1 ) {
 assert( cisc->oper_input_base() == 2, "Only adding one edge");
 cisc->ins_req(1,src);         // Requires a memory edge
 }
-block->_nodes.map(j,cisc);          // Insert into basic block
+block->map_node(cisc, j);          // Insert into basic block
 n->subsume_by(cisc, C); // Correct graph
 //
 ++_used_cisc_instructions;
 #ifndef PRODUCT
 if( TraceCISCSpill ) {
 // Initialize it once and make it shared:
 // set control to _root and place it into Start block
 // (where top() node is placed).
 base->init_req(0, _cfg.get_root_node());
 Block *startb = _cfg.get_block_for_node(C->top());
-startb->_nodes.insert(startb->find_node(C->top()), base );
+startb->insert_node(base, startb->find_node(C->top()));
 _cfg.map_node_to_block(base, startb);
 assert(_lrg_map.live_range_id(base) == 0, "should not have LRG yet");
 }
 if (_lrg_map.live_range_id(base) == 0) {
 new_lrg(base, maxlrg++);
 base->as_Phi()->set_type(t);
 // Search the current block for an existing base-Phi
 Block *b = _cfg.get_block_for_node(derived);
 for( i = 1; i <= b->end_idx(); i++ ) {// Search for matching Phi
-Node *phi = b->_nodes[i];
+Node *phi = b->get_node(i);
 if( !phi->is_Phi() ) {      // Found end of Phis with no match?
-b->_nodes.insert( i, base ); // Must insert created Phi here as base
+b->insert_node(base,  i); // Must insert created Phi here as base
 _cfg.map_node_to_block(base, b);
 new_lrg(base,maxlrg++);
 break;
 }
 // See if Phi matches.
 // Note use of deep-copy constructor.  I cannot hammer the original
 // liveout bits, because they are needed by the following coalesce pass.
 IndexSet liveout(_live->live(block));
 for (uint j = block->end_idx() + 1; j > 1; j--) {
-Node* n = block->_nodes[j - 1];
+Node* n = block->get_node(j - 1);
 // Pre-split compares of loop-phis.  Loop-phis form a cycle we would
 // like to see in the same register.  Compare uses the loop-phi and so
 // extends its live range BUT cannot be part of the cycle.  If this
 // extended live range overlaps with the update of the loop-phi value
 void PhaseChaitin::dump(const Block *b) const {
 b->dump_head(&_cfg);
 // For all instructions
-for( uint j = 0; j < b->_nodes.size(); j++ )
+for( uint j = 0; j < b->number_of_nodes(); j++ )
-dump(b->_nodes[j]);
+dump(b->get_node(j));
 // Print live-out info at end of block
 if( _live ) {
 tty->print("Liveout: ");
 IndexSet *live = _live->live(b);
 IndexSetIterator elements(live);
 for (uint i = 0; i < _cfg.number_of_blocks(); i++) {
 Block* block = _cfg.get_block(i);
 int dump_once = 0;
 // For all instructions
-for( uint j = 0; j < block->_nodes.size(); j++ ) {
+for( uint j = 0; j < block->number_of_nodes(); j++ ) {
-Node *n = block->_nodes[j];
+Node *n = block->get_node(j);
 if (_lrg_map.find_const(n) == lidx) {
 if (!dump_once++) {
 tty->cr();
 block->dump_head(&_cfg);
 }

changeset 19717	7819ffdaf0ff
parent 19334	3aa9ca404965
child 20007	b67e71448544