equal
deleted
inserted
replaced
299 assert(_cfg.get_block_for_node(proj) == borig, "incorrect block for kill projections"); |
299 assert(_cfg.get_block_for_node(proj) == borig, "incorrect block for kill projections"); |
300 found_projs++; |
300 found_projs++; |
301 // Copy kill projections after the cloned node |
301 // Copy kill projections after the cloned node |
302 Node* kills = proj->clone(); |
302 Node* kills = proj->clone(); |
303 kills->set_req(0, copy); |
303 kills->set_req(0, copy); |
304 b->_nodes.insert(idx++, kills); |
304 b->insert_node(kills, idx++); |
305 _cfg.map_node_to_block(kills, b); |
305 _cfg.map_node_to_block(kills, b); |
306 new_lrg(kills, max_lrg_id++); |
306 new_lrg(kills, max_lrg_id++); |
307 } |
307 } |
308 } |
308 } |
309 return found_projs; |
309 return found_projs; |
680 // get allocated, but instead rely on correct scheduling to ensure that |
680 // get allocated, but instead rely on correct scheduling to ensure that |
681 // only one instance is simultaneously live at a time. |
681 // only one instance is simultaneously live at a time. |
682 uint lr_counter = 1; |
682 uint lr_counter = 1; |
683 for( uint i = 0; i < _cfg.number_of_blocks(); i++ ) { |
683 for( uint i = 0; i < _cfg.number_of_blocks(); i++ ) { |
684 Block* block = _cfg.get_block(i); |
684 Block* block = _cfg.get_block(i); |
685 uint cnt = block->_nodes.size(); |
685 uint cnt = block->number_of_nodes(); |
686 |
686 |
687 // Handle all the normal Nodes in the block |
687 // Handle all the normal Nodes in the block |
688 for( uint j = 0; j < cnt; j++ ) { |
688 for( uint j = 0; j < cnt; j++ ) { |
689 Node *n = block->_nodes[j]; |
689 Node *n = block->get_node(j); |
690 // Pre-color to the zero live range, or pick virtual register |
690 // Pre-color to the zero live range, or pick virtual register |
691 const RegMask &rm = n->out_RegMask(); |
691 const RegMask &rm = n->out_RegMask(); |
692 _lrg_map.map(n->_idx, rm.is_NotEmpty() ? lr_counter++ : 0); |
692 _lrg_map.map(n->_idx, rm.is_NotEmpty() ? lr_counter++ : 0); |
693 } |
693 } |
694 } |
694 } |
708 // For all blocks |
708 // For all blocks |
709 for (uint i = 0; i < _cfg.number_of_blocks(); i++) { |
709 for (uint i = 0; i < _cfg.number_of_blocks(); i++) { |
710 Block* block = _cfg.get_block(i); |
710 Block* block = _cfg.get_block(i); |
711 |
711 |
712 // For all instructions |
712 // For all instructions |
713 for (uint j = 1; j < block->_nodes.size(); j++) { |
713 for (uint j = 1; j < block->number_of_nodes(); j++) { |
714 Node* n = block->_nodes[j]; |
714 Node* n = block->get_node(j); |
715 uint input_edge_start =1; // Skip control most nodes |
715 uint input_edge_start =1; // Skip control most nodes |
716 if (n->is_Mach()) { |
716 if (n->is_Mach()) { |
717 input_edge_start = n->as_Mach()->oper_input_base(); |
717 input_edge_start = n->as_Mach()->oper_input_base(); |
718 } |
718 } |
719 uint idx = n->is_Copy(); |
719 uint idx = n->is_Copy(); |
1602 Block* block = _cfg.get_block(i); |
1602 Block* block = _cfg.get_block(i); |
1603 |
1603 |
1604 // For all instructions in block |
1604 // For all instructions in block |
1605 uint last_inst = block->end_idx(); |
1605 uint last_inst = block->end_idx(); |
1606 for (uint j = 1; j <= last_inst; j++) { |
1606 for (uint j = 1; j <= last_inst; j++) { |
1607 Node* n = block->_nodes[j]; |
1607 Node* n = block->get_node(j); |
1608 |
1608 |
1609 // Dead instruction??? |
1609 // Dead instruction??? |
1610 assert( n->outcnt() != 0 ||// Nothing dead after post alloc |
1610 assert( n->outcnt() != 0 ||// Nothing dead after post alloc |
1611 C->top() == n || // Or the random TOP node |
1611 C->top() == n || // Or the random TOP node |
1612 n->is_Proj(), // Or a fat-proj kill node |
1612 n->is_Proj(), // Or a fat-proj kill node |
1639 cisc->set_req(inp,fp); // Base register is frame pointer |
1639 cisc->set_req(inp,fp); // Base register is frame pointer |
1640 if( cisc->oper_input_base() > 1 && mach->oper_input_base() <= 1 ) { |
1640 if( cisc->oper_input_base() > 1 && mach->oper_input_base() <= 1 ) { |
1641 assert( cisc->oper_input_base() == 2, "Only adding one edge"); |
1641 assert( cisc->oper_input_base() == 2, "Only adding one edge"); |
1642 cisc->ins_req(1,src); // Requires a memory edge |
1642 cisc->ins_req(1,src); // Requires a memory edge |
1643 } |
1643 } |
1644 block->_nodes.map(j,cisc); // Insert into basic block |
1644 block->map_node(cisc, j); // Insert into basic block |
1645 n->subsume_by(cisc, C); // Correct graph |
1645 n->subsume_by(cisc, C); // Correct graph |
1646 // |
1646 // |
1647 ++_used_cisc_instructions; |
1647 ++_used_cisc_instructions; |
1648 #ifndef PRODUCT |
1648 #ifndef PRODUCT |
1649 if( TraceCISCSpill ) { |
1649 if( TraceCISCSpill ) { |
1696 // Initialize it once and make it shared: |
1696 // Initialize it once and make it shared: |
1697 // set control to _root and place it into Start block |
1697 // set control to _root and place it into Start block |
1698 // (where top() node is placed). |
1698 // (where top() node is placed). |
1699 base->init_req(0, _cfg.get_root_node()); |
1699 base->init_req(0, _cfg.get_root_node()); |
1700 Block *startb = _cfg.get_block_for_node(C->top()); |
1700 Block *startb = _cfg.get_block_for_node(C->top()); |
1701 startb->_nodes.insert(startb->find_node(C->top()), base ); |
1701 startb->insert_node(base, startb->find_node(C->top())); |
1702 _cfg.map_node_to_block(base, startb); |
1702 _cfg.map_node_to_block(base, startb); |
1703 assert(_lrg_map.live_range_id(base) == 0, "should not have LRG yet"); |
1703 assert(_lrg_map.live_range_id(base) == 0, "should not have LRG yet"); |
1704 } |
1704 } |
1705 if (_lrg_map.live_range_id(base) == 0) { |
1705 if (_lrg_map.live_range_id(base) == 0) { |
1706 new_lrg(base, maxlrg++); |
1706 new_lrg(base, maxlrg++); |
1741 base->as_Phi()->set_type(t); |
1741 base->as_Phi()->set_type(t); |
1742 |
1742 |
1743 // Search the current block for an existing base-Phi |
1743 // Search the current block for an existing base-Phi |
1744 Block *b = _cfg.get_block_for_node(derived); |
1744 Block *b = _cfg.get_block_for_node(derived); |
1745 for( i = 1; i <= b->end_idx(); i++ ) {// Search for matching Phi |
1745 for( i = 1; i <= b->end_idx(); i++ ) {// Search for matching Phi |
1746 Node *phi = b->_nodes[i]; |
1746 Node *phi = b->get_node(i); |
1747 if( !phi->is_Phi() ) { // Found end of Phis with no match? |
1747 if( !phi->is_Phi() ) { // Found end of Phis with no match? |
1748 b->_nodes.insert( i, base ); // Must insert created Phi here as base |
1748 b->insert_node(base, i); // Must insert created Phi here as base |
1749 _cfg.map_node_to_block(base, b); |
1749 _cfg.map_node_to_block(base, b); |
1750 new_lrg(base,maxlrg++); |
1750 new_lrg(base,maxlrg++); |
1751 break; |
1751 break; |
1752 } |
1752 } |
1753 // See if Phi matches. |
1753 // See if Phi matches. |
1784 // Note use of deep-copy constructor. I cannot hammer the original |
1784 // Note use of deep-copy constructor. I cannot hammer the original |
1785 // liveout bits, because they are needed by the following coalesce pass. |
1785 // liveout bits, because they are needed by the following coalesce pass. |
1786 IndexSet liveout(_live->live(block)); |
1786 IndexSet liveout(_live->live(block)); |
1787 |
1787 |
1788 for (uint j = block->end_idx() + 1; j > 1; j--) { |
1788 for (uint j = block->end_idx() + 1; j > 1; j--) { |
1789 Node* n = block->_nodes[j - 1]; |
1789 Node* n = block->get_node(j - 1); |
1790 |
1790 |
1791 // Pre-split compares of loop-phis. Loop-phis form a cycle we would |
1791 // Pre-split compares of loop-phis. Loop-phis form a cycle we would |
1792 // like to see in the same register. Compare uses the loop-phi and so |
1792 // like to see in the same register. Compare uses the loop-phi and so |
1793 // extends its live range BUT cannot be part of the cycle. If this |
1793 // extends its live range BUT cannot be part of the cycle. If this |
1794 // extended live range overlaps with the update of the loop-phi value |
1794 // extended live range overlaps with the update of the loop-phi value |
1977 |
1977 |
1978 void PhaseChaitin::dump(const Block *b) const { |
1978 void PhaseChaitin::dump(const Block *b) const { |
1979 b->dump_head(&_cfg); |
1979 b->dump_head(&_cfg); |
1980 |
1980 |
1981 // For all instructions |
1981 // For all instructions |
1982 for( uint j = 0; j < b->_nodes.size(); j++ ) |
1982 for( uint j = 0; j < b->number_of_nodes(); j++ ) |
1983 dump(b->_nodes[j]); |
1983 dump(b->get_node(j)); |
1984 // Print live-out info at end of block |
1984 // Print live-out info at end of block |
1985 if( _live ) { |
1985 if( _live ) { |
1986 tty->print("Liveout: "); |
1986 tty->print("Liveout: "); |
1987 IndexSet *live = _live->live(b); |
1987 IndexSet *live = _live->live(b); |
1988 IndexSetIterator elements(live); |
1988 IndexSetIterator elements(live); |
2269 for (uint i = 0; i < _cfg.number_of_blocks(); i++) { |
2269 for (uint i = 0; i < _cfg.number_of_blocks(); i++) { |
2270 Block* block = _cfg.get_block(i); |
2270 Block* block = _cfg.get_block(i); |
2271 int dump_once = 0; |
2271 int dump_once = 0; |
2272 |
2272 |
2273 // For all instructions |
2273 // For all instructions |
2274 for( uint j = 0; j < block->_nodes.size(); j++ ) { |
2274 for( uint j = 0; j < block->number_of_nodes(); j++ ) { |
2275 Node *n = block->_nodes[j]; |
2275 Node *n = block->get_node(j); |
2276 if (_lrg_map.find_const(n) == lidx) { |
2276 if (_lrg_map.find_const(n) == lidx) { |
2277 if (!dump_once++) { |
2277 if (!dump_once++) { |
2278 tty->cr(); |
2278 tty->cr(); |
2279 block->dump_head(&_cfg); |
2279 block->dump_head(&_cfg); |
2280 } |
2280 } |