changeset 46630 | 75aa3e39d02c |
parent 46378 | 4ccca1fdf627 |
46629:8eeacdc76bf2 | 46630:75aa3e39d02c |
---|---|
78 const RegMask *w_o_mask; |
78 const RegMask *w_o_mask; |
79 |
79 |
80 int num_regs = RegMask::num_registers(ireg); |
80 int num_regs = RegMask::num_registers(ireg); |
81 bool is_vect = RegMask::is_vector(ireg); |
81 bool is_vect = RegMask::is_vector(ireg); |
82 if( w_mask->overlap( *o_mask ) && // Overlap AND |
82 if( w_mask->overlap( *o_mask ) && // Overlap AND |
83 ((num_regs == 1) // Single use or aligned |
83 (num_regs == 1 // Single use or aligned |
84 || is_vect // or vector |
84 || is_vect // or vector |
85 || !is_vect && o_mask->is_aligned_pairs()) ) { |
85 || (!is_vect && o_mask->is_aligned_pairs())) ) { |
86 assert(!is_vect || o_mask->is_aligned_sets(num_regs), "vectors are aligned"); |
86 assert(!is_vect || o_mask->is_aligned_sets(num_regs), "vectors are aligned"); |
87 // Don't come here for mis-aligned doubles |
87 // Don't come here for mis-aligned doubles |
88 w_o_mask = w_mask; |
88 w_o_mask = w_mask; |
89 } else { // wide ideal mask does not overlap with o_mask |
89 } else { // wide ideal mask does not overlap with o_mask |
90 // Mis-aligned doubles come here and XMM->FPR moves on x86. |
90 // Mis-aligned doubles come here and XMM->FPR moves on x86. |
1031 // bound use if we can't rematerialize the def, or if we need the |
1031 // bound use if we can't rematerialize the def, or if we need the |
1032 // split to form a misaligned pair. |
1032 // split to form a misaligned pair. |
1033 if( !umask.is_AllStack() && |
1033 if( !umask.is_AllStack() && |
1034 (int)umask.Size() <= lrgs(useidx).num_regs() && |
1034 (int)umask.Size() <= lrgs(useidx).num_regs() && |
1035 (!def->rematerialize() || |
1035 (!def->rematerialize() || |
1036 !is_vect && umask.is_misaligned_pair())) { |
1036 (!is_vect && umask.is_misaligned_pair()))) { |
1037 // These need a Split regardless of overlap or pressure |
1037 // These need a Split regardless of overlap or pressure |
1038 // SPLIT - NO DEF - NO CISC SPILL |
1038 // SPLIT - NO DEF - NO CISC SPILL |
1039 maxlrg = split_USE(MachSpillCopyNode::Bound, def,b,n,inpidx,maxlrg,dup,false, splits,slidx); |
1039 maxlrg = split_USE(MachSpillCopyNode::Bound, def,b,n,inpidx,maxlrg,dup,false, splits,slidx); |
1040 // If it wasn't split bail |
1040 // If it wasn't split bail |
1041 if (!maxlrg) { |
1041 if (!maxlrg) { |
1186 bool defup = dmask.is_UP(); |
1186 bool defup = dmask.is_UP(); |
1187 uint ireg = n->ideal_reg(); |
1187 uint ireg = n->ideal_reg(); |
1188 bool is_vect = RegMask::is_vector(ireg); |
1188 bool is_vect = RegMask::is_vector(ireg); |
1189 // Only split at Def if this is a HRP block or bound (and spilled once) |
1189 // Only split at Def if this is a HRP block or bound (and spilled once) |
1190 if( !n->rematerialize() && |
1190 if( !n->rematerialize() && |
1191 (((dmask.is_bound(ireg) || !is_vect && dmask.is_misaligned_pair()) && |
1191 (((dmask.is_bound(ireg) || (!is_vect && dmask.is_misaligned_pair())) && |
1192 (deflrg._direct_conflict || deflrg._must_spill)) || |
1192 (deflrg._direct_conflict || deflrg._must_spill)) || |
1193 // Check for LRG being up in a register and we are inside a high |
1193 // Check for LRG being up in a register and we are inside a high |
1194 // pressure area. Spill it down immediately. |
1194 // pressure area. Spill it down immediately. |
1195 (defup && is_high_pressure(b,&deflrg,insidx))) ) { |
1195 (defup && is_high_pressure(b,&deflrg,insidx))) ) { |
1196 assert( !n->rematerialize(), "" ); |
1196 assert( !n->rematerialize(), "" ); |