5048 __ movzwq($dst$$Register, $mem$$Address); |
5059 __ movzwq($dst$$Register, $mem$$Address); |
5049 %} |
5060 %} |
5050 ins_pipe(ialu_reg_mem); |
5061 ins_pipe(ialu_reg_mem); |
5051 %} |
5062 %} |
5052 |
5063 |
5053 // Load Integer with a 32-bit mask into Long Register |
5064 // Load Integer with a 31-bit mask into Long Register |
5054 instruct loadI2L_immI(rRegL dst, memory mem, immI mask, rFlagsReg cr) %{ |
5065 instruct loadI2L_immU31(rRegL dst, memory mem, immU31 mask, rFlagsReg cr) %{ |
5055 match(Set dst (ConvI2L (AndI (LoadI mem) mask))); |
5066 match(Set dst (ConvI2L (AndI (LoadI mem) mask))); |
5056 effect(KILL cr); |
5067 effect(KILL cr); |
5057 |
5068 |
5058 format %{ "movl $dst, $mem\t# int & 32-bit mask -> long\n\t" |
5069 format %{ "movl $dst, $mem\t# int & 31-bit mask -> long\n\t" |
5059 "andl $dst, $mask" %} |
5070 "andl $dst, $mask" %} |
5060 ins_encode %{ |
5071 ins_encode %{ |
5061 Register Rdst = $dst$$Register; |
5072 Register Rdst = $dst$$Register; |
5062 __ movl(Rdst, $mem$$Address); |
5073 __ movl(Rdst, $mem$$Address); |
5063 __ andl(Rdst, $mask$$constant); |
5074 __ andl(Rdst, $mask$$constant); |