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1 /* |
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2 * Copyright (c) 1999, 2015, Oracle and/or its affiliates. All rights reserved. |
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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4 * |
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5 * This code is free software; you can redistribute it and/or modify it |
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6 * under the terms of the GNU General Public License version 2 only, as |
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7 * published by the Free Software Foundation. |
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8 * |
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9 * This code is distributed in the hope that it will be useful, but WITHOUT |
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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12 * version 2 for more details (a copy is included in the LICENSE file that |
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13 * accompanied this code). |
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14 * |
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15 * You should have received a copy of the GNU General Public License version |
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16 * 2 along with this work; if not, write to the Free Software Foundation, |
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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18 * |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
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22 * |
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23 */ |
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24 |
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25 #include "precompiled.hpp" |
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26 #include "c1/c1_CodeStubs.hpp" |
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27 #include "c1/c1_FrameMap.hpp" |
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28 #include "c1/c1_LIRAssembler.hpp" |
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29 #include "c1/c1_MacroAssembler.hpp" |
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30 #include "c1/c1_Runtime1.hpp" |
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31 #include "nativeInst_x86.hpp" |
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32 #include "runtime/sharedRuntime.hpp" |
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33 #include "utilities/align.hpp" |
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34 #include "utilities/macros.hpp" |
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35 #include "vmreg_x86.inline.hpp" |
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36 #if INCLUDE_ALL_GCS |
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37 #include "gc/g1/g1SATBCardTableModRefBS.hpp" |
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38 #endif // INCLUDE_ALL_GCS |
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39 |
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40 |
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41 #define __ ce->masm()-> |
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42 |
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43 float ConversionStub::float_zero = 0.0; |
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44 double ConversionStub::double_zero = 0.0; |
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45 |
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46 void ConversionStub::emit_code(LIR_Assembler* ce) { |
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47 __ bind(_entry); |
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48 assert(bytecode() == Bytecodes::_f2i || bytecode() == Bytecodes::_d2i, "other conversions do not require stub"); |
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49 |
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50 |
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51 if (input()->is_single_xmm()) { |
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52 __ comiss(input()->as_xmm_float_reg(), |
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53 ExternalAddress((address)&float_zero)); |
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54 } else if (input()->is_double_xmm()) { |
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55 __ comisd(input()->as_xmm_double_reg(), |
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56 ExternalAddress((address)&double_zero)); |
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57 } else { |
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58 LP64_ONLY(ShouldNotReachHere()); |
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59 __ push(rax); |
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60 __ ftst(); |
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61 __ fnstsw_ax(); |
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62 __ sahf(); |
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63 __ pop(rax); |
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64 } |
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65 |
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66 Label NaN, do_return; |
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67 __ jccb(Assembler::parity, NaN); |
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68 __ jccb(Assembler::below, do_return); |
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69 |
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70 // input is > 0 -> return maxInt |
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71 // result register already contains 0x80000000, so subtracting 1 gives 0x7fffffff |
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72 __ decrement(result()->as_register()); |
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73 __ jmpb(do_return); |
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74 |
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75 // input is NaN -> return 0 |
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76 __ bind(NaN); |
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77 __ xorptr(result()->as_register(), result()->as_register()); |
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78 |
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79 __ bind(do_return); |
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80 __ jmp(_continuation); |
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81 } |
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82 |
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83 void CounterOverflowStub::emit_code(LIR_Assembler* ce) { |
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84 __ bind(_entry); |
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85 Metadata *m = _method->as_constant_ptr()->as_metadata(); |
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86 ce->store_parameter(m, 1); |
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87 ce->store_parameter(_bci, 0); |
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88 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::counter_overflow_id))); |
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89 ce->add_call_info_here(_info); |
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90 ce->verify_oop_map(_info); |
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91 __ jmp(_continuation); |
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92 } |
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93 |
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94 RangeCheckStub::RangeCheckStub(CodeEmitInfo* info, LIR_Opr index, |
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95 bool throw_index_out_of_bounds_exception) |
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96 : _throw_index_out_of_bounds_exception(throw_index_out_of_bounds_exception) |
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97 , _index(index) |
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98 { |
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99 assert(info != NULL, "must have info"); |
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100 _info = new CodeEmitInfo(info); |
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101 } |
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102 |
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103 |
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104 void RangeCheckStub::emit_code(LIR_Assembler* ce) { |
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105 __ bind(_entry); |
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106 if (_info->deoptimize_on_exception()) { |
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107 address a = Runtime1::entry_for(Runtime1::predicate_failed_trap_id); |
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108 __ call(RuntimeAddress(a)); |
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109 ce->add_call_info_here(_info); |
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110 ce->verify_oop_map(_info); |
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111 debug_only(__ should_not_reach_here()); |
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112 return; |
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113 } |
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114 |
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115 // pass the array index on stack because all registers must be preserved |
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116 if (_index->is_cpu_register()) { |
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117 ce->store_parameter(_index->as_register(), 0); |
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118 } else { |
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119 ce->store_parameter(_index->as_jint(), 0); |
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120 } |
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121 Runtime1::StubID stub_id; |
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122 if (_throw_index_out_of_bounds_exception) { |
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123 stub_id = Runtime1::throw_index_exception_id; |
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124 } else { |
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125 stub_id = Runtime1::throw_range_check_failed_id; |
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126 } |
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127 __ call(RuntimeAddress(Runtime1::entry_for(stub_id))); |
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128 ce->add_call_info_here(_info); |
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129 ce->verify_oop_map(_info); |
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130 debug_only(__ should_not_reach_here()); |
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131 } |
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132 |
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133 PredicateFailedStub::PredicateFailedStub(CodeEmitInfo* info) { |
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134 _info = new CodeEmitInfo(info); |
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135 } |
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136 |
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137 void PredicateFailedStub::emit_code(LIR_Assembler* ce) { |
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138 __ bind(_entry); |
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139 address a = Runtime1::entry_for(Runtime1::predicate_failed_trap_id); |
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140 __ call(RuntimeAddress(a)); |
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141 ce->add_call_info_here(_info); |
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142 ce->verify_oop_map(_info); |
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143 debug_only(__ should_not_reach_here()); |
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144 } |
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145 |
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146 void DivByZeroStub::emit_code(LIR_Assembler* ce) { |
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147 if (_offset != -1) { |
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148 ce->compilation()->implicit_exception_table()->append(_offset, __ offset()); |
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149 } |
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150 __ bind(_entry); |
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151 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::throw_div0_exception_id))); |
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152 ce->add_call_info_here(_info); |
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153 debug_only(__ should_not_reach_here()); |
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154 } |
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155 |
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156 |
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157 // Implementation of NewInstanceStub |
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158 |
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159 NewInstanceStub::NewInstanceStub(LIR_Opr klass_reg, LIR_Opr result, ciInstanceKlass* klass, CodeEmitInfo* info, Runtime1::StubID stub_id) { |
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160 _result = result; |
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161 _klass = klass; |
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162 _klass_reg = klass_reg; |
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163 _info = new CodeEmitInfo(info); |
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164 assert(stub_id == Runtime1::new_instance_id || |
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165 stub_id == Runtime1::fast_new_instance_id || |
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166 stub_id == Runtime1::fast_new_instance_init_check_id, |
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167 "need new_instance id"); |
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168 _stub_id = stub_id; |
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169 } |
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170 |
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171 |
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172 void NewInstanceStub::emit_code(LIR_Assembler* ce) { |
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173 assert(__ rsp_offset() == 0, "frame size should be fixed"); |
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174 __ bind(_entry); |
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175 __ movptr(rdx, _klass_reg->as_register()); |
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176 __ call(RuntimeAddress(Runtime1::entry_for(_stub_id))); |
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177 ce->add_call_info_here(_info); |
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178 ce->verify_oop_map(_info); |
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179 assert(_result->as_register() == rax, "result must in rax,"); |
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180 __ jmp(_continuation); |
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181 } |
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182 |
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183 |
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184 // Implementation of NewTypeArrayStub |
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185 |
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186 NewTypeArrayStub::NewTypeArrayStub(LIR_Opr klass_reg, LIR_Opr length, LIR_Opr result, CodeEmitInfo* info) { |
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187 _klass_reg = klass_reg; |
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188 _length = length; |
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189 _result = result; |
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190 _info = new CodeEmitInfo(info); |
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191 } |
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192 |
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193 |
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194 void NewTypeArrayStub::emit_code(LIR_Assembler* ce) { |
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195 assert(__ rsp_offset() == 0, "frame size should be fixed"); |
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196 __ bind(_entry); |
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197 assert(_length->as_register() == rbx, "length must in rbx,"); |
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198 assert(_klass_reg->as_register() == rdx, "klass_reg must in rdx"); |
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199 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::new_type_array_id))); |
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200 ce->add_call_info_here(_info); |
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201 ce->verify_oop_map(_info); |
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202 assert(_result->as_register() == rax, "result must in rax,"); |
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203 __ jmp(_continuation); |
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204 } |
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205 |
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206 |
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207 // Implementation of NewObjectArrayStub |
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208 |
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209 NewObjectArrayStub::NewObjectArrayStub(LIR_Opr klass_reg, LIR_Opr length, LIR_Opr result, CodeEmitInfo* info) { |
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210 _klass_reg = klass_reg; |
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211 _result = result; |
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212 _length = length; |
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213 _info = new CodeEmitInfo(info); |
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214 } |
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215 |
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216 |
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217 void NewObjectArrayStub::emit_code(LIR_Assembler* ce) { |
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218 assert(__ rsp_offset() == 0, "frame size should be fixed"); |
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219 __ bind(_entry); |
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220 assert(_length->as_register() == rbx, "length must in rbx,"); |
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221 assert(_klass_reg->as_register() == rdx, "klass_reg must in rdx"); |
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222 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::new_object_array_id))); |
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223 ce->add_call_info_here(_info); |
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224 ce->verify_oop_map(_info); |
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225 assert(_result->as_register() == rax, "result must in rax,"); |
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226 __ jmp(_continuation); |
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227 } |
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228 |
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229 |
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230 // Implementation of MonitorAccessStubs |
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231 |
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232 MonitorEnterStub::MonitorEnterStub(LIR_Opr obj_reg, LIR_Opr lock_reg, CodeEmitInfo* info) |
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233 : MonitorAccessStub(obj_reg, lock_reg) |
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234 { |
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235 _info = new CodeEmitInfo(info); |
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236 } |
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237 |
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238 |
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239 void MonitorEnterStub::emit_code(LIR_Assembler* ce) { |
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240 assert(__ rsp_offset() == 0, "frame size should be fixed"); |
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241 __ bind(_entry); |
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242 ce->store_parameter(_obj_reg->as_register(), 1); |
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243 ce->store_parameter(_lock_reg->as_register(), 0); |
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244 Runtime1::StubID enter_id; |
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245 if (ce->compilation()->has_fpu_code()) { |
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246 enter_id = Runtime1::monitorenter_id; |
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247 } else { |
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248 enter_id = Runtime1::monitorenter_nofpu_id; |
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249 } |
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250 __ call(RuntimeAddress(Runtime1::entry_for(enter_id))); |
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251 ce->add_call_info_here(_info); |
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252 ce->verify_oop_map(_info); |
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253 __ jmp(_continuation); |
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254 } |
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255 |
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256 |
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257 void MonitorExitStub::emit_code(LIR_Assembler* ce) { |
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258 __ bind(_entry); |
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259 if (_compute_lock) { |
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260 // lock_reg was destroyed by fast unlocking attempt => recompute it |
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261 ce->monitor_address(_monitor_ix, _lock_reg); |
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262 } |
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263 ce->store_parameter(_lock_reg->as_register(), 0); |
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264 // note: non-blocking leaf routine => no call info needed |
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265 Runtime1::StubID exit_id; |
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266 if (ce->compilation()->has_fpu_code()) { |
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267 exit_id = Runtime1::monitorexit_id; |
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268 } else { |
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269 exit_id = Runtime1::monitorexit_nofpu_id; |
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270 } |
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271 __ call(RuntimeAddress(Runtime1::entry_for(exit_id))); |
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272 __ jmp(_continuation); |
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273 } |
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274 |
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275 |
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276 // Implementation of patching: |
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277 // - Copy the code at given offset to an inlined buffer (first the bytes, then the number of bytes) |
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278 // - Replace original code with a call to the stub |
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279 // At Runtime: |
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280 // - call to stub, jump to runtime |
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281 // - in runtime: preserve all registers (rspecially objects, i.e., source and destination object) |
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282 // - in runtime: after initializing class, restore original code, reexecute instruction |
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283 |
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284 int PatchingStub::_patch_info_offset = -NativeGeneralJump::instruction_size; |
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285 |
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286 void PatchingStub::align_patch_site(MacroAssembler* masm) { |
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287 // We're patching a 5-7 byte instruction on intel and we need to |
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288 // make sure that we don't see a piece of the instruction. It |
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289 // appears mostly impossible on Intel to simply invalidate other |
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290 // processors caches and since they may do aggressive prefetch it's |
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291 // very hard to make a guess about what code might be in the icache. |
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292 // Force the instruction to be double word aligned so that it |
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293 // doesn't span a cache line. |
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294 masm->align(align_up((int)NativeGeneralJump::instruction_size, wordSize)); |
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295 } |
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296 |
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297 void PatchingStub::emit_code(LIR_Assembler* ce) { |
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298 assert(NativeCall::instruction_size <= _bytes_to_copy && _bytes_to_copy <= 0xFF, "not enough room for call"); |
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299 |
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300 Label call_patch; |
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301 |
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302 // static field accesses have special semantics while the class |
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303 // initializer is being run so we emit a test which can be used to |
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304 // check that this code is being executed by the initializing |
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305 // thread. |
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306 address being_initialized_entry = __ pc(); |
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307 if (CommentedAssembly) { |
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308 __ block_comment(" patch template"); |
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309 } |
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310 if (_id == load_klass_id) { |
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311 // produce a copy of the load klass instruction for use by the being initialized case |
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312 #ifdef ASSERT |
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313 address start = __ pc(); |
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314 #endif |
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315 Metadata* o = NULL; |
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316 __ mov_metadata(_obj, o); |
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317 #ifdef ASSERT |
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318 for (int i = 0; i < _bytes_to_copy; i++) { |
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319 address ptr = (address)(_pc_start + i); |
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320 int a_byte = (*ptr) & 0xFF; |
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321 assert(a_byte == *start++, "should be the same code"); |
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322 } |
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323 #endif |
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324 } else if (_id == load_mirror_id) { |
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325 // produce a copy of the load mirror instruction for use by the being |
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326 // initialized case |
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327 #ifdef ASSERT |
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328 address start = __ pc(); |
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329 #endif |
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330 jobject o = NULL; |
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331 __ movoop(_obj, o); |
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332 #ifdef ASSERT |
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333 for (int i = 0; i < _bytes_to_copy; i++) { |
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334 address ptr = (address)(_pc_start + i); |
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335 int a_byte = (*ptr) & 0xFF; |
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336 assert(a_byte == *start++, "should be the same code"); |
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337 } |
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338 #endif |
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339 } else { |
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340 // make a copy the code which is going to be patched. |
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341 for (int i = 0; i < _bytes_to_copy; i++) { |
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342 address ptr = (address)(_pc_start + i); |
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343 int a_byte = (*ptr) & 0xFF; |
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344 __ emit_int8(a_byte); |
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345 *ptr = 0x90; // make the site look like a nop |
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346 } |
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347 } |
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348 |
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349 address end_of_patch = __ pc(); |
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350 int bytes_to_skip = 0; |
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351 if (_id == load_mirror_id) { |
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352 int offset = __ offset(); |
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353 if (CommentedAssembly) { |
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354 __ block_comment(" being_initialized check"); |
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355 } |
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356 assert(_obj != noreg, "must be a valid register"); |
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357 Register tmp = rax; |
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358 Register tmp2 = rbx; |
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359 __ push(tmp); |
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360 __ push(tmp2); |
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361 // Load without verification to keep code size small. We need it because |
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362 // begin_initialized_entry_offset has to fit in a byte. Also, we know it's not null. |
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363 __ movptr(tmp2, Address(_obj, java_lang_Class::klass_offset_in_bytes())); |
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364 __ get_thread(tmp); |
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365 __ cmpptr(tmp, Address(tmp2, InstanceKlass::init_thread_offset())); |
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366 __ pop(tmp2); |
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367 __ pop(tmp); |
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368 __ jcc(Assembler::notEqual, call_patch); |
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369 |
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370 // access_field patches may execute the patched code before it's |
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371 // copied back into place so we need to jump back into the main |
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372 // code of the nmethod to continue execution. |
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373 __ jmp(_patch_site_continuation); |
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374 |
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375 // make sure this extra code gets skipped |
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376 bytes_to_skip += __ offset() - offset; |
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377 } |
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378 if (CommentedAssembly) { |
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379 __ block_comment("patch data encoded as movl"); |
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380 } |
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381 // Now emit the patch record telling the runtime how to find the |
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382 // pieces of the patch. We only need 3 bytes but for readability of |
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383 // the disassembly we make the data look like a movl reg, imm32, |
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384 // which requires 5 bytes |
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385 int sizeof_patch_record = 5; |
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386 bytes_to_skip += sizeof_patch_record; |
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387 |
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388 // emit the offsets needed to find the code to patch |
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389 int being_initialized_entry_offset = __ pc() - being_initialized_entry + sizeof_patch_record; |
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390 |
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391 __ emit_int8((unsigned char)0xB8); |
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392 __ emit_int8(0); |
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393 __ emit_int8(being_initialized_entry_offset); |
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394 __ emit_int8(bytes_to_skip); |
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395 __ emit_int8(_bytes_to_copy); |
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396 address patch_info_pc = __ pc(); |
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397 assert(patch_info_pc - end_of_patch == bytes_to_skip, "incorrect patch info"); |
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398 |
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399 address entry = __ pc(); |
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400 NativeGeneralJump::insert_unconditional((address)_pc_start, entry); |
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401 address target = NULL; |
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402 relocInfo::relocType reloc_type = relocInfo::none; |
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403 switch (_id) { |
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404 case access_field_id: target = Runtime1::entry_for(Runtime1::access_field_patching_id); break; |
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405 case load_klass_id: target = Runtime1::entry_for(Runtime1::load_klass_patching_id); reloc_type = relocInfo::metadata_type; break; |
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406 case load_mirror_id: target = Runtime1::entry_for(Runtime1::load_mirror_patching_id); reloc_type = relocInfo::oop_type; break; |
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407 case load_appendix_id: target = Runtime1::entry_for(Runtime1::load_appendix_patching_id); reloc_type = relocInfo::oop_type; break; |
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408 default: ShouldNotReachHere(); |
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409 } |
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410 __ bind(call_patch); |
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411 |
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412 if (CommentedAssembly) { |
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413 __ block_comment("patch entry point"); |
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414 } |
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415 __ call(RuntimeAddress(target)); |
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416 assert(_patch_info_offset == (patch_info_pc - __ pc()), "must not change"); |
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417 ce->add_call_info_here(_info); |
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418 int jmp_off = __ offset(); |
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419 __ jmp(_patch_site_entry); |
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420 // Add enough nops so deoptimization can overwrite the jmp above with a call |
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421 // and not destroy the world. We cannot use fat nops here, since the concurrent |
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422 // code rewrite may transiently create the illegal instruction sequence. |
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423 for (int j = __ offset() ; j < jmp_off + 5 ; j++ ) { |
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424 __ nop(); |
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425 } |
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426 if (_id == load_klass_id || _id == load_mirror_id || _id == load_appendix_id) { |
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427 CodeSection* cs = __ code_section(); |
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428 RelocIterator iter(cs, (address)_pc_start, (address)(_pc_start + 1)); |
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429 relocInfo::change_reloc_info_for_address(&iter, (address) _pc_start, reloc_type, relocInfo::none); |
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430 } |
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431 } |
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432 |
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433 |
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434 void DeoptimizeStub::emit_code(LIR_Assembler* ce) { |
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435 __ bind(_entry); |
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436 ce->store_parameter(_trap_request, 0); |
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437 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::deoptimize_id))); |
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438 ce->add_call_info_here(_info); |
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439 DEBUG_ONLY(__ should_not_reach_here()); |
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440 } |
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441 |
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442 |
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443 void ImplicitNullCheckStub::emit_code(LIR_Assembler* ce) { |
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444 address a; |
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445 if (_info->deoptimize_on_exception()) { |
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446 // Deoptimize, do not throw the exception, because it is probably wrong to do it here. |
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447 a = Runtime1::entry_for(Runtime1::predicate_failed_trap_id); |
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448 } else { |
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449 a = Runtime1::entry_for(Runtime1::throw_null_pointer_exception_id); |
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450 } |
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451 |
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452 ce->compilation()->implicit_exception_table()->append(_offset, __ offset()); |
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453 __ bind(_entry); |
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454 __ call(RuntimeAddress(a)); |
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455 ce->add_call_info_here(_info); |
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456 ce->verify_oop_map(_info); |
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457 debug_only(__ should_not_reach_here()); |
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458 } |
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459 |
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460 |
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461 void SimpleExceptionStub::emit_code(LIR_Assembler* ce) { |
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462 assert(__ rsp_offset() == 0, "frame size should be fixed"); |
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463 |
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464 __ bind(_entry); |
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465 // pass the object on stack because all registers must be preserved |
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466 if (_obj->is_cpu_register()) { |
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467 ce->store_parameter(_obj->as_register(), 0); |
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468 } |
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469 __ call(RuntimeAddress(Runtime1::entry_for(_stub))); |
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470 ce->add_call_info_here(_info); |
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471 debug_only(__ should_not_reach_here()); |
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472 } |
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473 |
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474 |
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475 void ArrayCopyStub::emit_code(LIR_Assembler* ce) { |
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476 //---------------slow case: call to native----------------- |
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477 __ bind(_entry); |
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478 // Figure out where the args should go |
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479 // This should really convert the IntrinsicID to the Method* and signature |
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480 // but I don't know how to do that. |
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481 // |
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482 VMRegPair args[5]; |
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483 BasicType signature[5] = { T_OBJECT, T_INT, T_OBJECT, T_INT, T_INT}; |
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484 SharedRuntime::java_calling_convention(signature, args, 5, true); |
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485 |
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486 // push parameters |
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487 // (src, src_pos, dest, destPos, length) |
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488 Register r[5]; |
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489 r[0] = src()->as_register(); |
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490 r[1] = src_pos()->as_register(); |
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491 r[2] = dst()->as_register(); |
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492 r[3] = dst_pos()->as_register(); |
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493 r[4] = length()->as_register(); |
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494 |
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495 // next registers will get stored on the stack |
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496 for (int i = 0; i < 5 ; i++ ) { |
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497 VMReg r_1 = args[i].first(); |
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498 if (r_1->is_stack()) { |
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499 int st_off = r_1->reg2stack() * wordSize; |
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500 __ movptr (Address(rsp, st_off), r[i]); |
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501 } else { |
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502 assert(r[i] == args[i].first()->as_Register(), "Wrong register for arg "); |
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503 } |
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504 } |
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505 |
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506 ce->align_call(lir_static_call); |
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507 |
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508 ce->emit_static_call_stub(); |
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509 if (ce->compilation()->bailed_out()) { |
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510 return; // CodeCache is full |
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511 } |
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512 AddressLiteral resolve(SharedRuntime::get_resolve_static_call_stub(), |
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513 relocInfo::static_call_type); |
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514 __ call(resolve); |
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515 ce->add_call_info_here(info()); |
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516 |
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517 #ifndef PRODUCT |
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518 __ incrementl(ExternalAddress((address)&Runtime1::_arraycopy_slowcase_cnt)); |
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519 #endif |
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520 |
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521 __ jmp(_continuation); |
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522 } |
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523 |
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524 ///////////////////////////////////////////////////////////////////////////// |
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525 #if INCLUDE_ALL_GCS |
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526 |
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527 void G1PreBarrierStub::emit_code(LIR_Assembler* ce) { |
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528 // At this point we know that marking is in progress. |
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529 // If do_load() is true then we have to emit the |
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530 // load of the previous value; otherwise it has already |
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531 // been loaded into _pre_val. |
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532 |
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533 __ bind(_entry); |
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534 assert(pre_val()->is_register(), "Precondition."); |
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535 |
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536 Register pre_val_reg = pre_val()->as_register(); |
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537 |
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538 if (do_load()) { |
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539 ce->mem2reg(addr(), pre_val(), T_OBJECT, patch_code(), info(), false /*wide*/, false /*unaligned*/); |
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540 } |
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541 |
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542 __ cmpptr(pre_val_reg, (int32_t) NULL_WORD); |
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543 __ jcc(Assembler::equal, _continuation); |
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544 ce->store_parameter(pre_val()->as_register(), 0); |
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545 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::g1_pre_barrier_slow_id))); |
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546 __ jmp(_continuation); |
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547 |
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548 } |
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549 |
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550 void G1PostBarrierStub::emit_code(LIR_Assembler* ce) { |
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551 __ bind(_entry); |
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552 assert(addr()->is_register(), "Precondition."); |
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553 assert(new_val()->is_register(), "Precondition."); |
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554 Register new_val_reg = new_val()->as_register(); |
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555 __ cmpptr(new_val_reg, (int32_t) NULL_WORD); |
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556 __ jcc(Assembler::equal, _continuation); |
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557 ce->store_parameter(addr()->as_pointer_register(), 0); |
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558 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::g1_post_barrier_slow_id))); |
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559 __ jmp(_continuation); |
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560 } |
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561 |
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562 #endif // INCLUDE_ALL_GCS |
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563 ///////////////////////////////////////////////////////////////////////////// |
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564 |
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565 #undef __ |