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1 /* |
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2 * Copyright (c) 1999, 2017, Oracle and/or its affiliates. All rights reserved. |
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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4 * |
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5 * This code is free software; you can redistribute it and/or modify it |
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6 * under the terms of the GNU General Public License version 2 only, as |
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7 * published by the Free Software Foundation. |
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8 * |
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9 * This code is distributed in the hope that it will be useful, but WITHOUT |
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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12 * version 2 for more details (a copy is included in the LICENSE file that |
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13 * accompanied this code). |
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14 * |
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15 * You should have received a copy of the GNU General Public License version |
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16 * 2 along with this work; if not, write to the Free Software Foundation, |
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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18 * |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
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22 * |
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23 */ |
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24 |
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25 #ifndef CPU_SPARC_VM_C1_FRAMEMAP_SPARC_HPP |
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26 #define CPU_SPARC_VM_C1_FRAMEMAP_SPARC_HPP |
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27 |
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28 public: |
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29 |
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30 enum { |
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31 nof_reg_args = 6, // registers o0-o5 are available for parameter passing |
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32 first_available_sp_in_frame = frame::memory_parameter_word_sp_offset * BytesPerWord, |
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33 frame_pad_in_bytes = 0 |
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34 }; |
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35 |
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36 static const int pd_c_runtime_reserved_arg_size; |
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37 |
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38 static LIR_Opr G0_opr; |
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39 static LIR_Opr G1_opr; |
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40 static LIR_Opr G2_opr; |
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41 static LIR_Opr G3_opr; |
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42 static LIR_Opr G4_opr; |
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43 static LIR_Opr G5_opr; |
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44 static LIR_Opr G6_opr; |
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45 static LIR_Opr G7_opr; |
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46 static LIR_Opr O0_opr; |
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47 static LIR_Opr O1_opr; |
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48 static LIR_Opr O2_opr; |
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49 static LIR_Opr O3_opr; |
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50 static LIR_Opr O4_opr; |
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51 static LIR_Opr O5_opr; |
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52 static LIR_Opr O6_opr; |
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53 static LIR_Opr O7_opr; |
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54 static LIR_Opr L0_opr; |
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55 static LIR_Opr L1_opr; |
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56 static LIR_Opr L2_opr; |
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57 static LIR_Opr L3_opr; |
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58 static LIR_Opr L4_opr; |
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59 static LIR_Opr L5_opr; |
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60 static LIR_Opr L6_opr; |
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61 static LIR_Opr L7_opr; |
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62 static LIR_Opr I0_opr; |
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63 static LIR_Opr I1_opr; |
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64 static LIR_Opr I2_opr; |
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65 static LIR_Opr I3_opr; |
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66 static LIR_Opr I4_opr; |
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67 static LIR_Opr I5_opr; |
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68 static LIR_Opr I6_opr; |
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69 static LIR_Opr I7_opr; |
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70 |
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71 static LIR_Opr SP_opr; |
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72 static LIR_Opr FP_opr; |
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73 |
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74 static LIR_Opr G0_oop_opr; |
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75 static LIR_Opr G1_oop_opr; |
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76 static LIR_Opr G2_oop_opr; |
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77 static LIR_Opr G3_oop_opr; |
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78 static LIR_Opr G4_oop_opr; |
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79 static LIR_Opr G5_oop_opr; |
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80 static LIR_Opr G6_oop_opr; |
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81 static LIR_Opr G7_oop_opr; |
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82 static LIR_Opr O0_oop_opr; |
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83 static LIR_Opr O1_oop_opr; |
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84 static LIR_Opr O2_oop_opr; |
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85 static LIR_Opr O3_oop_opr; |
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86 static LIR_Opr O4_oop_opr; |
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87 static LIR_Opr O5_oop_opr; |
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88 static LIR_Opr O6_oop_opr; |
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89 static LIR_Opr O7_oop_opr; |
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90 static LIR_Opr L0_oop_opr; |
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91 static LIR_Opr L1_oop_opr; |
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92 static LIR_Opr L2_oop_opr; |
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93 static LIR_Opr L3_oop_opr; |
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94 static LIR_Opr L4_oop_opr; |
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95 static LIR_Opr L5_oop_opr; |
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96 static LIR_Opr L6_oop_opr; |
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97 static LIR_Opr L7_oop_opr; |
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98 static LIR_Opr I0_oop_opr; |
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99 static LIR_Opr I1_oop_opr; |
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100 static LIR_Opr I2_oop_opr; |
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101 static LIR_Opr I3_oop_opr; |
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102 static LIR_Opr I4_oop_opr; |
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103 static LIR_Opr I5_oop_opr; |
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104 static LIR_Opr I6_oop_opr; |
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105 static LIR_Opr I7_oop_opr; |
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106 |
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107 static LIR_Opr G0_metadata_opr; |
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108 static LIR_Opr G1_metadata_opr; |
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109 static LIR_Opr G2_metadata_opr; |
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110 static LIR_Opr G3_metadata_opr; |
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111 static LIR_Opr G4_metadata_opr; |
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112 static LIR_Opr G5_metadata_opr; |
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113 static LIR_Opr G6_metadata_opr; |
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114 static LIR_Opr G7_metadata_opr; |
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115 static LIR_Opr O0_metadata_opr; |
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116 static LIR_Opr O1_metadata_opr; |
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117 static LIR_Opr O2_metadata_opr; |
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118 static LIR_Opr O3_metadata_opr; |
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119 static LIR_Opr O4_metadata_opr; |
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120 static LIR_Opr O5_metadata_opr; |
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121 static LIR_Opr O6_metadata_opr; |
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122 static LIR_Opr O7_metadata_opr; |
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123 static LIR_Opr L0_metadata_opr; |
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124 static LIR_Opr L1_metadata_opr; |
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125 static LIR_Opr L2_metadata_opr; |
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126 static LIR_Opr L3_metadata_opr; |
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127 static LIR_Opr L4_metadata_opr; |
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128 static LIR_Opr L5_metadata_opr; |
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129 static LIR_Opr L6_metadata_opr; |
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130 static LIR_Opr L7_metadata_opr; |
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131 static LIR_Opr I0_metadata_opr; |
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132 static LIR_Opr I1_metadata_opr; |
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133 static LIR_Opr I2_metadata_opr; |
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134 static LIR_Opr I3_metadata_opr; |
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135 static LIR_Opr I4_metadata_opr; |
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136 static LIR_Opr I5_metadata_opr; |
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137 static LIR_Opr I6_metadata_opr; |
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138 static LIR_Opr I7_metadata_opr; |
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139 |
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140 static LIR_Opr in_long_opr; |
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141 static LIR_Opr out_long_opr; |
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142 static LIR_Opr g1_long_single_opr; |
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143 |
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144 static LIR_Opr F0_opr; |
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145 static LIR_Opr F0_double_opr; |
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146 |
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147 static LIR_Opr Oexception_opr; |
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148 static LIR_Opr Oissuing_pc_opr; |
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149 |
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150 private: |
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151 static FloatRegister _fpu_regs [nof_fpu_regs]; |
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152 |
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153 static LIR_Opr as_long_single_opr(Register r) { |
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154 return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r)); |
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155 } |
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156 static LIR_Opr as_long_pair_opr(Register r) { |
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157 return LIR_OprFact::double_cpu(cpu_reg2rnr(r->successor()), cpu_reg2rnr(r)); |
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158 } |
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159 |
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160 public: |
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161 |
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162 static LIR_Opr as_long_opr(Register r) { |
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163 return as_long_single_opr(r); |
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164 } |
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165 static LIR_Opr as_pointer_opr(Register r) { |
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166 return as_long_single_opr(r); |
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167 } |
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168 static LIR_Opr as_float_opr(FloatRegister r) { |
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169 return LIR_OprFact::single_fpu(r->encoding()); |
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170 } |
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171 static LIR_Opr as_double_opr(FloatRegister r) { |
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172 return LIR_OprFact::double_fpu(r->successor()->encoding(), r->encoding()); |
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173 } |
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174 |
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175 static FloatRegister nr2floatreg (int rnr); |
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176 |
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177 static VMReg fpu_regname (int n); |
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178 |
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179 static bool is_caller_save_register (LIR_Opr reg); |
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180 static bool is_caller_save_register (Register r); |
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181 |
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182 static int nof_caller_save_cpu_regs() { return pd_nof_caller_save_cpu_regs_frame_map; } |
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183 static int last_cpu_reg() { return pd_last_cpu_reg; } |
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184 |
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185 #endif // CPU_SPARC_VM_C1_FRAMEMAP_SPARC_HPP |