1 /*

     2  * Copyright (c) 2016, Oracle and/or its affiliates. All rights reserved.

     3  * Copyright (c) 2016 SAP SE. All rights reserved.

     4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.

     5  *

     6  * This code is free software; you can redistribute it and/or modify it

     7  * under the terms of the GNU General Public License version 2 only, as

     8  * published by the Free Software Foundation.

     9  *

    10  * This code is distributed in the hope that it will be useful, but WITHOUT

    11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

    12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

    13  * version 2 for more details (a copy is included in the LICENSE file that

    14  * accompanied this code).

    15  *

    16  * You should have received a copy of the GNU General Public License version

    17  * 2 along with this work; if not, write to the Free Software Foundation,

    18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

    19  *

    20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA

    21  * or visit www.oracle.com if you need additional information or have any

    22  * questions.

    23  *

    24  */

    25 

    26 #ifndef CPU_S390_VM_REGISTER_S390_HPP

    27 #define CPU_S390_VM_REGISTER_S390_HPP

    28 

    29 #include "asm/register.hpp"

    30 #include "vm_version_s390.hpp"

    31 

    32 class Address;

    33 class VMRegImpl;

    34 

    35 typedef VMRegImpl* VMReg;

    36 

    37 // Use Register as shortcut.

    38 class RegisterImpl;

    39 typedef RegisterImpl* Register;

    40 

    41 // The implementation of integer registers for z/Architecture.

    42 

    43 // z/Architecture registers, see "LINUX for zSeries ELF ABI Supplement", IBM March 2001

    44 //

    45 //   r0-r1     General purpose (volatile)

    46 //   r2        Parameter and return value (volatile)

    47 //   r3        TOC pointer (volatile)

    48 //   r3-r5     Parameters (volatile)

    49 //   r6        Parameter (nonvolatile)

    50 //   r7-r11    Locals (nonvolatile)

    51 //   r12       Local, often used as GOT pointer (nonvolatile)

    52 //   r13       Local, often used as toc (nonvolatile)

    53 //   r14       return address (volatile)

    54 //   r15       stack pointer (nonvolatile)

    55 //

    56 //   f0,f2,f4,f6 Parameters (volatile)

    57 //   f1,f3,f5,f7 General purpose (volatile)

    58 //   f8-f15      General purpose (nonvolatile)

    59 

    60 inline Register as_Register(int encoding) {

    61   return (Register)(long)encoding;

    62 }

    63 

    64 class RegisterImpl: public AbstractRegisterImpl {

    65  public:

    66   enum {

    67     number_of_registers     = 16,

    68     number_of_arg_registers = 5

    69   };

    70 

    71   // general construction

    72   inline friend Register as_Register(int encoding);

    73 

    74   inline VMReg as_VMReg();

    75 

    76   // accessors

    77   int   encoding() const      { assert(is_valid(), "invalid register"); return value(); }

    78   const char* name() const;

    79 

    80   // testers

    81   bool is_valid() const       { return (0 <= (value()&0x7F) && (value()&0x7F) < number_of_registers); }

    82   bool is_even() const        { return (encoding() & 1) == 0; }

    83   bool is_volatile() const    { return (0 <= (value()&0x7F) && (value()&0x7F) <= 5) || (value()&0x7F)==14; }

    84   bool is_nonvolatile() const { return is_valid() && !is_volatile(); }

    85 

    86  public:

    87   // derived registers, offsets, and addresses

    88   Register predecessor() const { return as_Register((encoding()-1) & (number_of_registers-1)); }

    89   Register successor() const   { return as_Register((encoding() + 1) & (number_of_registers-1)); }

    90 };

    91 

    92 // The integer registers of the z/Architecture.

    93 

    94 CONSTANT_REGISTER_DECLARATION(Register, noreg, (-1));

    95 

    96 CONSTANT_REGISTER_DECLARATION(Register, Z_R0,   (0));

    97 CONSTANT_REGISTER_DECLARATION(Register, Z_R1,   (1));

    98 CONSTANT_REGISTER_DECLARATION(Register, Z_R2,   (2));

    99 CONSTANT_REGISTER_DECLARATION(Register, Z_R3,   (3));

   100 CONSTANT_REGISTER_DECLARATION(Register, Z_R4,   (4));

   101 CONSTANT_REGISTER_DECLARATION(Register, Z_R5,   (5));

   102 CONSTANT_REGISTER_DECLARATION(Register, Z_R6,   (6));

   103 CONSTANT_REGISTER_DECLARATION(Register, Z_R7,   (7));

   104 CONSTANT_REGISTER_DECLARATION(Register, Z_R8,   (8));

   105 CONSTANT_REGISTER_DECLARATION(Register, Z_R9,   (9));

   106 CONSTANT_REGISTER_DECLARATION(Register, Z_R10, (10));

   107 CONSTANT_REGISTER_DECLARATION(Register, Z_R11, (11));

   108 CONSTANT_REGISTER_DECLARATION(Register, Z_R12, (12));

   109 CONSTANT_REGISTER_DECLARATION(Register, Z_R13, (13));

   110 CONSTANT_REGISTER_DECLARATION(Register, Z_R14, (14));

   111 CONSTANT_REGISTER_DECLARATION(Register, Z_R15, (15));

   112 

   113 // Use ConditionRegister as shortcut

   114 class ConditionRegisterImpl;

   115 typedef ConditionRegisterImpl* ConditionRegister;

   116 

   117 // The implementation of condition register(s) for the z/Architecture.

   118 

   119 class ConditionRegisterImpl: public AbstractRegisterImpl {

   120  public:

   121 

   122   enum {

   123     number_of_registers = 1

   124   };

   125 

   126   // accessors

   127   int encoding() const {

   128     assert(is_valid(), "invalid register"); return value();

   129   }

   130 

   131   // testers

   132   bool is_valid() const {

   133     return (0 <= value() && value() < number_of_registers);

   134   }

   135   bool is_volatile() const {

   136     return true;

   137   }

   138   bool is_nonvolatile() const {

   139     return false;

   140   }

   141 

   142   // construction.

   143   inline friend ConditionRegister as_ConditionRegister(int encoding);

   144 

   145   inline VMReg as_VMReg();

   146 };

   147 

   148 inline ConditionRegister as_ConditionRegister(int encoding) {

   149   assert(encoding >= 0 && encoding < ConditionRegisterImpl::number_of_registers, "bad condition register encoding");

   150   return (ConditionRegister)(long)encoding;

   151 }

   152 

   153 // The condition register of the z/Architecture.

   154 

   155 CONSTANT_REGISTER_DECLARATION(ConditionRegister, Z_CR, (0));

   156 

   157 // Because z/Architecture has so many registers, #define'ing values for them is

   158 // beneficial in code size and is worth the cost of some of the

   159 // dangers of defines.

   160 // If a particular file has a problem with these defines then it's possible

   161 // to turn them off in that file by defining

   162 // DONT_USE_REGISTER_DEFINES. Register_definition_s390.cpp does that

   163 // so that it's able to provide real definitions of these registers

   164 // for use in debuggers and such.

   165 

   166 #ifndef DONT_USE_REGISTER_DEFINES

   167 #define noreg ((Register)(noreg_RegisterEnumValue))

   168 

   169 #define Z_R0  ((Register)(Z_R0_RegisterEnumValue))

   170 #define Z_R1  ((Register)(Z_R1_RegisterEnumValue))

   171 #define Z_R2  ((Register)(Z_R2_RegisterEnumValue))

   172 #define Z_R3  ((Register)(Z_R3_RegisterEnumValue))

   173 #define Z_R4  ((Register)(Z_R4_RegisterEnumValue))

   174 #define Z_R5  ((Register)(Z_R5_RegisterEnumValue))

   175 #define Z_R6  ((Register)(Z_R6_RegisterEnumValue))

   176 #define Z_R7  ((Register)(Z_R7_RegisterEnumValue))

   177 #define Z_R8  ((Register)(Z_R8_RegisterEnumValue))

   178 #define Z_R9  ((Register)(Z_R9_RegisterEnumValue))

   179 #define Z_R10 ((Register)(Z_R10_RegisterEnumValue))

   180 #define Z_R11 ((Register)(Z_R11_RegisterEnumValue))

   181 #define Z_R12 ((Register)(Z_R12_RegisterEnumValue))

   182 #define Z_R13 ((Register)(Z_R13_RegisterEnumValue))

   183 #define Z_R14 ((Register)(Z_R14_RegisterEnumValue))

   184 #define Z_R15 ((Register)(Z_R15_RegisterEnumValue))

   185 

   186 #define Z_CR ((ConditionRegister)(Z_CR_ConditionRegisterEnumValue))

   187 #endif // DONT_USE_REGISTER_DEFINES

   188 

   189 // Use FloatRegister as shortcut

   190 class FloatRegisterImpl;

   191 typedef FloatRegisterImpl* FloatRegister;

   192 

   193 // The implementation of float registers for the z/Architecture.

   194 

   195 inline FloatRegister as_FloatRegister(int encoding) {

   196   return (FloatRegister)(long)encoding;

   197 }

   198 

   199 class FloatRegisterImpl: public AbstractRegisterImpl {

   200  public:

   201   enum {

   202     number_of_registers     = 16,

   203     number_of_arg_registers = 4

   204   };

   205 

   206   // construction

   207   inline friend FloatRegister as_FloatRegister(int encoding);

   208 

   209   inline VMReg as_VMReg();

   210 

   211   // accessors

   212   int encoding() const                                {

   213      assert(is_valid(), "invalid register"); return value();

   214   }

   215 

   216   bool  is_valid() const          { return 0 <= value() && value() < number_of_registers; }

   217   bool is_volatile() const        { return (0 <= (value()&0x7F) && (value()&0x7F) <= 7); }

   218   bool is_nonvolatile() const     { return (8 <= (value()&0x7F) && (value()&0x7F) <= 15); }

   219 

   220   const char* name() const;

   221 

   222   FloatRegister successor() const { return as_FloatRegister(encoding() + 1); }

   223 };

   224 

   225 // The float registers of z/Architecture.

   226 

   227 CONSTANT_REGISTER_DECLARATION(FloatRegister, fnoreg, (-1));

   228 

   229 CONSTANT_REGISTER_DECLARATION(FloatRegister,  Z_F0,  (0));

   230 CONSTANT_REGISTER_DECLARATION(FloatRegister,  Z_F1,  (1));

   231 CONSTANT_REGISTER_DECLARATION(FloatRegister,  Z_F2,  (2));

   232 CONSTANT_REGISTER_DECLARATION(FloatRegister,  Z_F3,  (3));

   233 CONSTANT_REGISTER_DECLARATION(FloatRegister,  Z_F4,  (4));

   234 CONSTANT_REGISTER_DECLARATION(FloatRegister,  Z_F5,  (5));

   235 CONSTANT_REGISTER_DECLARATION(FloatRegister,  Z_F6,  (6));

   236 CONSTANT_REGISTER_DECLARATION(FloatRegister,  Z_F7,  (7));

   237 CONSTANT_REGISTER_DECLARATION(FloatRegister,  Z_F8,  (8));

   238 CONSTANT_REGISTER_DECLARATION(FloatRegister,  Z_F9,  (9));

   239 CONSTANT_REGISTER_DECLARATION(FloatRegister, Z_F10, (10));

   240 CONSTANT_REGISTER_DECLARATION(FloatRegister, Z_F11, (11));

   241 CONSTANT_REGISTER_DECLARATION(FloatRegister, Z_F12, (12));

   242 CONSTANT_REGISTER_DECLARATION(FloatRegister, Z_F13, (13));

   243 CONSTANT_REGISTER_DECLARATION(FloatRegister, Z_F14, (14));

   244 CONSTANT_REGISTER_DECLARATION(FloatRegister, Z_F15, (15));

   245 

   246 #ifndef DONT_USE_REGISTER_DEFINES

   247 #define fnoreg ((FloatRegister)(fnoreg_FloatRegisterEnumValue))

   248 #define Z_F0  ((FloatRegister)(   Z_F0_FloatRegisterEnumValue))

   249 #define Z_F1  ((FloatRegister)(   Z_F1_FloatRegisterEnumValue))

   250 #define Z_F2  ((FloatRegister)(   Z_F2_FloatRegisterEnumValue))

   251 #define Z_F3  ((FloatRegister)(   Z_F3_FloatRegisterEnumValue))

   252 #define Z_F4  ((FloatRegister)(   Z_F4_FloatRegisterEnumValue))

   253 #define Z_F5  ((FloatRegister)(   Z_F5_FloatRegisterEnumValue))

   254 #define Z_F6  ((FloatRegister)(   Z_F6_FloatRegisterEnumValue))

   255 #define Z_F7  ((FloatRegister)(   Z_F7_FloatRegisterEnumValue))

   256 #define Z_F8  ((FloatRegister)(   Z_F8_FloatRegisterEnumValue))

   257 #define Z_F9  ((FloatRegister)(   Z_F9_FloatRegisterEnumValue))

   258 #define Z_F10 ((FloatRegister)(  Z_F10_FloatRegisterEnumValue))

   259 #define Z_F11 ((FloatRegister)(  Z_F11_FloatRegisterEnumValue))

   260 #define Z_F12 ((FloatRegister)(  Z_F12_FloatRegisterEnumValue))

   261 #define Z_F13 ((FloatRegister)(  Z_F13_FloatRegisterEnumValue))

   262 #define Z_F14 ((FloatRegister)(  Z_F14_FloatRegisterEnumValue))

   263 #define Z_F15 ((FloatRegister)(  Z_F15_FloatRegisterEnumValue))

   264 #endif // DONT_USE_REGISTER_DEFINES

   265 

   266 // Need to know the total number of registers of all sorts for SharedInfo.

   267 // Define a class that exports it.

   268 

   269 class ConcreteRegisterImpl : public AbstractRegisterImpl {

   270  public:

   271   enum {

   272     number_of_registers =

   273       (RegisterImpl::number_of_registers +

   274       FloatRegisterImpl::number_of_registers)

   275       * 2 // register halves

   276       + 1 // condition code register

   277   };

   278   static const int max_gpr;

   279   static const int max_fpr;

   280 };

   281 

   282 // Single, Double and Quad fp reg classes. These exist to map the ADLC

   283 // encoding for a floating point register, to the FloatRegister number

   284 // desired by the macroassembler. A FloatRegister is a number between

   285 // 0 and 31 passed around as a pointer. For ADLC, an fp register encoding

   286 // is the actual bit encoding used by the z/Architecture hardware. When ADLC used

   287 // the macroassembler to generate an instruction that references, e.g., a

   288 // double fp reg, it passed the bit encoding to the macroassembler via

   289 // as_FloatRegister, which, for double regs > 30, returns an illegal

   290 // register number.

   291 //

   292 // Therefore we provide the following classes for use by ADLC. Their

   293 // sole purpose is to convert from z/Architecture register encodings to FloatRegisters.

   294 // At some future time, we might replace FloatRegister with these classes,

   295 // hence the definitions of as_xxxFloatRegister as class methods rather

   296 // than as external inline routines.

   297 

   298 class SingleFloatRegisterImpl;

   299 typedef SingleFloatRegisterImpl *SingleFloatRegister;

   300 

   301 class SingleFloatRegisterImpl {

   302  public:

   303   friend FloatRegister as_SingleFloatRegister(int encoding) {

   304     assert(encoding < 32, "bad single float register encoding");

   305     return as_FloatRegister(encoding);

   306   }

   307 };

   308 

   309 class DoubleFloatRegisterImpl;

   310 typedef DoubleFloatRegisterImpl *DoubleFloatRegister;

   311 

   312 class DoubleFloatRegisterImpl {

   313  public:

   314   friend FloatRegister as_DoubleFloatRegister(int encoding) {

   315     assert(encoding < 32, "bad double float register encoding");

   316     return as_FloatRegister(((encoding & 1) << 5) | (encoding & 0x1e));

   317   }

   318 };

   319 

   320 class QuadFloatRegisterImpl;

   321 typedef QuadFloatRegisterImpl *QuadFloatRegister;

   322 

   323 class QuadFloatRegisterImpl {

   324  public:

   325   friend FloatRegister as_QuadFloatRegister(int encoding) {

   326     assert(encoding < 32 && ((encoding & 2) == 0), "bad quad float register encoding");

   327     return as_FloatRegister(((encoding & 1) << 5) | (encoding & 0x1c));

   328   }

   329 };

   330 

   331 

   332 // Common register declarations used in assembler code.

   333 REGISTER_DECLARATION(Register,      Z_EXC_OOP, Z_R2);

   334 REGISTER_DECLARATION(Register,      Z_EXC_PC,  Z_R3);

   335 REGISTER_DECLARATION(Register,      Z_RET,     Z_R2);

   336 REGISTER_DECLARATION(Register,      Z_ARG1,    Z_R2);

   337 REGISTER_DECLARATION(Register,      Z_ARG2,    Z_R3);

   338 REGISTER_DECLARATION(Register,      Z_ARG3,    Z_R4);

   339 REGISTER_DECLARATION(Register,      Z_ARG4,    Z_R5);

   340 REGISTER_DECLARATION(Register,      Z_ARG5,    Z_R6);

   341 REGISTER_DECLARATION(Register,      Z_SP,     Z_R15);

   342 REGISTER_DECLARATION(FloatRegister, Z_FRET,    Z_F0);

   343 REGISTER_DECLARATION(FloatRegister, Z_FARG1,   Z_F0);

   344 REGISTER_DECLARATION(FloatRegister, Z_FARG2,   Z_F2);

   345 REGISTER_DECLARATION(FloatRegister, Z_FARG3,   Z_F4);

   346 REGISTER_DECLARATION(FloatRegister, Z_FARG4,   Z_F6);

   347 

   348 #ifndef DONT_USE_REGISTER_DEFINES

   349 #define Z_EXC_OOP         AS_REGISTER(Register,  Z_R2)

   350 #define Z_EXC_PC          AS_REGISTER(Register,  Z_R3)

   351 #define Z_RET             AS_REGISTER(Register,  Z_R2)

   352 #define Z_ARG1            AS_REGISTER(Register,  Z_R2)

   353 #define Z_ARG2            AS_REGISTER(Register,  Z_R3)

   354 #define Z_ARG3            AS_REGISTER(Register,  Z_R4)

   355 #define Z_ARG4            AS_REGISTER(Register,  Z_R5)

   356 #define Z_ARG5            AS_REGISTER(Register,  Z_R6)

   357 #define Z_SP              AS_REGISTER(Register, Z_R15)

   358 #define Z_FRET            AS_REGISTER(FloatRegister, Z_F0)

   359 #define Z_FARG1           AS_REGISTER(FloatRegister, Z_F0)

   360 #define Z_FARG2           AS_REGISTER(FloatRegister, Z_F2)

   361 #define Z_FARG3           AS_REGISTER(FloatRegister, Z_F4)

   362 #define Z_FARG4           AS_REGISTER(FloatRegister, Z_F6)

   363 #endif

   364 

   365 // Register declarations to be used in frame manager assembly code.

   366 // Use only non-volatile registers in order to keep values across C-calls.

   367 

   368 // Register to cache the integer value on top of the operand stack.

   369 REGISTER_DECLARATION(Register, Z_tos,         Z_R2);

   370 // Register to cache the fp value on top of the operand stack.

   371 REGISTER_DECLARATION(FloatRegister, Z_ftos,   Z_F0);

   372 // Expression stack pointer in interpreted java frame.

   373 REGISTER_DECLARATION(Register, Z_esp,         Z_R7);

   374 // Address of current thread.

   375 REGISTER_DECLARATION(Register, Z_thread,      Z_R8);

   376 // Address of current method. only valid in interpreter_entry.

   377 REGISTER_DECLARATION(Register, Z_method,      Z_R9);

   378 // Inline cache register. used by c1 and c2.

   379 REGISTER_DECLARATION(Register, Z_inline_cache,Z_R9);

   380 // Frame pointer of current interpreter frame. only valid while

   381 // executing bytecodes.

   382 REGISTER_DECLARATION(Register, Z_fp,          Z_R9);

   383 // Address of the locals array in an interpreted java frame.

   384 REGISTER_DECLARATION(Register, Z_locals,      Z_R12);

   385 // Bytecode pointer.

   386 REGISTER_DECLARATION(Register, Z_bcp,         Z_R13);

   387 // Bytecode which is dispatched (short lived!).

   388 REGISTER_DECLARATION(Register, Z_bytecode,    Z_R14);

   389 #ifndef DONT_USE_REGISTER_DEFINES

   390 #define Z_tos             AS_REGISTER(Register, Z_R2)

   391 #define Z_ftos            AS_REGISTER(FloatRegister, Z_F0)

   392 #define Z_esp             AS_REGISTER(Register, Z_R7)

   393 #define Z_thread          AS_REGISTER(Register, Z_R8)

   394 #define Z_method          AS_REGISTER(Register, Z_R9)

   395 #define Z_inline_cache    AS_REGISTER(Register, Z_R9)

   396 #define Z_fp              AS_REGISTER(Register, Z_R9)

   397 #define Z_locals          AS_REGISTER(Register, Z_R12)

   398 #define Z_bcp             AS_REGISTER(Register, Z_R13)

   399 #define Z_bytecode        AS_REGISTER(Register, Z_R14)

   400 #endif

   401 

   402 // Temporary registers to be used within frame manager. We can use

   403 // the nonvolatiles because the call stub has saved them.

   404 // Use only non-volatile registers in order to keep values across C-calls.

   405 REGISTER_DECLARATION(Register, Z_tmp_1,  Z_R10);

   406 REGISTER_DECLARATION(Register, Z_tmp_2,  Z_R11);

   407 REGISTER_DECLARATION(Register, Z_tmp_3,  Z_R12);

   408 REGISTER_DECLARATION(Register, Z_tmp_4,  Z_R13);

   409 #ifndef DONT_USE_REGISTER_DEFINES

   410 #define Z_tmp_1      AS_REGISTER(Register, Z_R10)

   411 #define Z_tmp_2      AS_REGISTER(Register, Z_R11)

   412 #define Z_tmp_3      AS_REGISTER(Register, Z_R12)

   413 #define Z_tmp_4      AS_REGISTER(Register, Z_R13)

   414 #endif

   415 

   416 // Scratch registers are volatile.

   417 REGISTER_DECLARATION(Register, Z_R0_scratch, Z_R0);

   418 REGISTER_DECLARATION(Register, Z_R1_scratch, Z_R1);

   419 REGISTER_DECLARATION(FloatRegister, Z_fscratch_1, Z_F1);

   420 #ifndef DONT_USE_REGISTER_DEFINES

   421 #define Z_R0_scratch  AS_REGISTER(Register, Z_R0)

   422 #define Z_R1_scratch  AS_REGISTER(Register, Z_R1)

   423 #define Z_fscratch_1  AS_REGISTER(FloatRegister, Z_F1)

   424 #endif

   425 

   426 

   427 #endif // CPU_S390_VM_REGISTER_S390_HPP