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1 /* |
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2 * Copyright (c) 2016, Oracle and/or its affiliates. All rights reserved. |
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3 * Copyright (c) 2016 SAP SE. All rights reserved. |
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4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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5 * |
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6 * This code is free software; you can redistribute it and/or modify it |
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7 * under the terms of the GNU General Public License version 2 only, as |
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8 * published by the Free Software Foundation. |
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9 * |
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10 * This code is distributed in the hope that it will be useful, but WITHOUT |
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11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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13 * version 2 for more details (a copy is included in the LICENSE file that |
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14 * accompanied this code). |
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15 * |
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16 * You should have received a copy of the GNU General Public License version |
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17 * 2 along with this work; if not, write to the Free Software Foundation, |
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18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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19 * |
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20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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21 * or visit www.oracle.com if you need additional information or have any |
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22 * questions. |
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23 * |
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24 */ |
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25 |
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26 #include "precompiled.hpp" |
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27 #include "asm/assembler.inline.hpp" |
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28 #include "compiler/disassembler.hpp" |
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29 #include "gc/shared/collectedHeap.inline.hpp" |
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30 #include "interpreter/interpreter.hpp" |
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31 #include "gc/shared/cardTableModRefBS.hpp" |
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32 #include "memory/resourceArea.hpp" |
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33 #include "prims/methodHandles.hpp" |
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34 #include "runtime/biasedLocking.hpp" |
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35 #include "runtime/interfaceSupport.hpp" |
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36 #include "runtime/objectMonitor.hpp" |
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37 #include "runtime/os.hpp" |
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38 #include "runtime/sharedRuntime.hpp" |
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39 #include "runtime/stubRoutines.hpp" |
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40 #include "utilities/macros.hpp" |
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41 #if INCLUDE_ALL_GCS |
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42 #include "gc/g1/g1CollectedHeap.inline.hpp" |
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43 #include "gc/g1/g1SATBCardTableModRefBS.hpp" |
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44 #include "gc/g1/heapRegion.hpp" |
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45 #endif |
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46 |
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47 // Convention: Use Z_R0 and Z_R1 instead of Z_scratch_* in all |
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48 // assembler_s390.* files. |
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49 |
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50 // Convert the raw encoding form into the form expected by the |
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51 // constructor for Address. This is called by adlc generated code. |
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52 Address Address::make_raw(int base, int index, int scale, int disp, relocInfo::relocType disp_reloc) { |
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53 assert(scale == 0, "Scale should not be used on z/Architecture. The call to make_raw is " |
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54 "generated by adlc and this must mirror all features of Operands from machnode.hpp."); |
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55 assert(disp_reloc == relocInfo::none, "not implemented on z/Architecture."); |
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56 |
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57 Address madr(as_Register(base), as_Register(index), in_ByteSize(disp)); |
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58 return madr; |
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59 } |
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60 |
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61 int AbstractAssembler::code_fill_byte() { |
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62 return 0x00; // Illegal instruction 0x00000000. |
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63 } |
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64 |
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65 // Condition code masks. Details see enum branch_condition. |
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66 // Although this method is meant for INT CCs, the Overflow/Ordered |
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67 // bit in the masks has to be considered. The CC might have been set |
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68 // by a float operation, but is evaluated while calculating an integer |
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69 // result. See elementary test TestFloat.isNotEqual(FF)Z for example. |
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70 Assembler::branch_condition Assembler::inverse_condition(Assembler::branch_condition cc) { |
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71 Assembler::branch_condition unordered_bit = (Assembler::branch_condition)(cc & bcondNotOrdered); |
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72 Assembler::branch_condition inverse_cc; |
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73 |
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74 // Some are commented out to avoid duplicate labels. |
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75 switch (cc) { |
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76 case bcondNever : inverse_cc = bcondAlways; break; // 0 -> 15 |
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77 case bcondAlways : inverse_cc = bcondNever; break; // 15 -> 0 |
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78 |
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79 case bcondOverflow : inverse_cc = bcondNotOverflow; break; // 1 -> 14 |
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80 case bcondNotOverflow : inverse_cc = bcondOverflow; break; // 14 -> 1 |
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81 |
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82 default : |
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83 switch ((Assembler::branch_condition)(cc & bcondOrdered)) { |
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84 case bcondEqual : inverse_cc = bcondNotEqual; break; // 8 -> 6 |
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85 // case bcondZero : |
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86 // case bcondAllZero : |
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87 |
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88 case bcondNotEqual : inverse_cc = bcondEqual; break; // 6 -> 8 |
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89 // case bcondNotZero : |
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90 // case bcondMixed : |
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91 |
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92 case bcondLow : inverse_cc = bcondNotLow; break; // 4 -> 10 |
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93 // case bcondNegative : |
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94 |
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95 case bcondNotLow : inverse_cc = bcondLow; break; // 10 -> 4 |
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96 // case bcondNotNegative : |
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97 |
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98 case bcondHigh : inverse_cc = bcondNotHigh; break; // 2 -> 12 |
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99 // case bcondPositive : |
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100 |
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101 case bcondNotHigh : inverse_cc = bcondHigh; break; // 12 -> 2 |
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102 // case bcondNotPositive : |
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103 |
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104 default : |
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105 fprintf(stderr, "inverse_condition(%d)\n", (int)cc); |
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106 fflush(stderr); |
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107 ShouldNotReachHere(); |
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108 return bcondNever; |
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109 } |
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110 // If cc is even, inverse_cc must be odd. |
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111 if (!unordered_bit) { |
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112 inverse_cc = (Assembler::branch_condition)(inverse_cc | bcondNotOrdered); |
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113 } |
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114 break; |
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115 } |
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116 return inverse_cc; |
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117 } |
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118 |
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119 Assembler::branch_condition Assembler::inverse_float_condition(Assembler::branch_condition cc) { |
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120 Assembler::branch_condition inverse_cc; |
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121 |
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122 switch (cc) { |
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123 case bcondNever : inverse_cc = bcondAlways; break; // 0 |
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124 case bcondAlways : inverse_cc = bcondNever; break; // 15 |
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125 |
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126 case bcondNotOrdered : inverse_cc = bcondOrdered; break; // 14 |
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127 case bcondOrdered : inverse_cc = bcondNotOrdered; break; // 1 |
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128 |
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129 case bcondEqual : inverse_cc = (branch_condition)(bcondNotEqual + bcondNotOrdered); break; // 8 |
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130 case bcondNotEqual + bcondNotOrdered : inverse_cc = bcondEqual; break; // 7 |
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131 |
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132 case bcondLow + bcondNotOrdered : inverse_cc = (branch_condition)(bcondHigh + bcondEqual); break; // 5 |
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133 case bcondNotLow : inverse_cc = (branch_condition)(bcondLow + bcondNotOrdered); break; // 10 |
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134 |
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135 case bcondHigh : inverse_cc = (branch_condition)(bcondLow + bcondNotOrdered + bcondEqual); break; // 2 |
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136 case bcondNotHigh + bcondNotOrdered : inverse_cc = bcondHigh; break; // 13 |
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137 |
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138 default : |
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139 fprintf(stderr, "inverse_float_condition(%d)\n", (int)cc); |
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140 fflush(stderr); |
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141 ShouldNotReachHere(); |
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142 return bcondNever; |
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143 } |
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144 return inverse_cc; |
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145 } |
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146 |
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147 #ifdef ASSERT |
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148 void Assembler::print_dbg_msg(outputStream* out, unsigned long inst, const char* msg, int ilen) { |
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149 out->flush(); |
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150 switch (ilen) { |
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151 case 2: out->print_cr("inst = %4.4x, %s", (unsigned short)inst, msg); break; |
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152 case 4: out->print_cr("inst = %8.8x, %s\n", (unsigned int)inst, msg); break; |
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153 case 6: out->print_cr("inst = %12.12lx, %s\n", inst, msg); break; |
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154 default: out->print_cr("inst = %16.16lx, %s\n", inst, msg); break; |
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155 } |
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156 out->flush(); |
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157 } |
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158 |
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159 void Assembler::dump_code_range(outputStream* out, address pc, const unsigned int range, const char* msg) { |
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160 out->cr(); |
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161 out->print_cr("-------------------------------"); |
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162 out->print_cr("-- %s", msg); |
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163 out->print_cr("-------------------------------"); |
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164 out->print_cr("Hex dump of +/-%d bytes around %p, interval [%p,%p)", range, pc, pc-range, pc+range); |
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165 os::print_hex_dump(out, pc-range, pc+range, 2); |
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166 |
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167 out->cr(); |
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168 out->print_cr("Disassembly of +/-%d bytes around %p, interval [%p,%p)", range, pc, pc-range, pc+range); |
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169 Disassembler::decode(pc, pc + range, out); |
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170 } |
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171 #endif |