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1 /* |
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2 * Copyright (c) 2002, 2015, Oracle and/or its affiliates. All rights reserved. |
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3 * Copyright (c) 2012, 2015 SAP SE. All rights reserved. |
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4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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5 * |
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6 * This code is free software; you can redistribute it and/or modify it |
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7 * under the terms of the GNU General Public License version 2 only, as |
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8 * published by the Free Software Foundation. |
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9 * |
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10 * This code is distributed in the hope that it will be useful, but WITHOUT |
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11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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13 * version 2 for more details (a copy is included in the LICENSE file that |
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14 * accompanied this code). |
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15 * |
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16 * You should have received a copy of the GNU General Public License version |
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17 * 2 along with this work; if not, write to the Free Software Foundation, |
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18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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19 * |
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20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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21 * or visit www.oracle.com if you need additional information or have any |
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22 * questions. |
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23 * |
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24 */ |
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25 |
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26 #ifndef CPU_PPC_VM_NATIVEINST_PPC_HPP |
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27 #define CPU_PPC_VM_NATIVEINST_PPC_HPP |
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28 |
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29 #include "asm/assembler.hpp" |
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30 #include "asm/macroAssembler.hpp" |
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31 #include "memory/allocation.hpp" |
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32 #include "runtime/icache.hpp" |
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33 #include "runtime/os.hpp" |
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34 |
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35 // We have interfaces for the following instructions: |
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36 // |
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37 // - NativeInstruction |
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38 // - NativeCall |
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39 // - NativeFarCall |
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40 // - NativeMovConstReg |
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41 // - NativeJump |
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42 // - NativeIllegalInstruction |
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43 // - NativeConditionalFarBranch |
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44 // - NativeCallTrampolineStub |
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45 |
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46 // The base class for different kinds of native instruction abstractions. |
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47 // It provides the primitive operations to manipulate code relative to this. |
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48 class NativeInstruction VALUE_OBJ_CLASS_SPEC { |
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49 friend class Relocation; |
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50 |
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51 public: |
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52 bool is_jump() { return Assembler::is_b(long_at(0)); } // See NativeGeneralJump. |
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53 |
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54 bool is_sigtrap_ic_miss_check() { |
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55 assert(UseSIGTRAP, "precondition"); |
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56 return MacroAssembler::is_trap_ic_miss_check(long_at(0)); |
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57 } |
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58 |
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59 bool is_sigtrap_null_check() { |
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60 assert(UseSIGTRAP && TrapBasedNullChecks, "precondition"); |
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61 return MacroAssembler::is_trap_null_check(long_at(0)); |
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62 } |
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63 |
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64 // We use a special trap for marking a method as not_entrant or zombie |
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65 // iff UseSIGTRAP. |
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66 bool is_sigtrap_zombie_not_entrant() { |
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67 assert(UseSIGTRAP, "precondition"); |
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68 return MacroAssembler::is_trap_zombie_not_entrant(long_at(0)); |
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69 } |
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70 |
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71 // We use an illtrap for marking a method as not_entrant or zombie |
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72 // iff !UseSIGTRAP. |
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73 bool is_sigill_zombie_not_entrant() { |
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74 assert(!UseSIGTRAP, "precondition"); |
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75 // Work around a C++ compiler bug which changes 'this'. |
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76 return NativeInstruction::is_sigill_zombie_not_entrant_at(addr_at(0)); |
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77 } |
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78 static bool is_sigill_zombie_not_entrant_at(address addr); |
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79 |
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80 #ifdef COMPILER2 |
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81 // SIGTRAP-based implicit range checks |
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82 bool is_sigtrap_range_check() { |
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83 assert(UseSIGTRAP && TrapBasedRangeChecks, "precondition"); |
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84 return MacroAssembler::is_trap_range_check(long_at(0)); |
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85 } |
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86 #endif |
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87 |
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88 // 'should not reach here'. |
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89 bool is_sigtrap_should_not_reach_here() { |
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90 return MacroAssembler::is_trap_should_not_reach_here(long_at(0)); |
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91 } |
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92 |
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93 bool is_safepoint_poll() { |
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94 // Is the current instruction a POTENTIAL read access to the polling page? |
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95 // The current arguments of the instruction are not checked! |
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96 return MacroAssembler::is_load_from_polling_page(long_at(0), NULL); |
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97 } |
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98 |
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99 bool is_memory_serialization(JavaThread *thread, void *ucontext) { |
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100 // Is the current instruction a write access of thread to the |
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101 // memory serialization page? |
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102 return MacroAssembler::is_memory_serialization(long_at(0), thread, ucontext); |
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103 } |
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104 |
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105 address get_stack_bang_address(void *ucontext) { |
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106 // If long_at(0) is not a stack bang, return 0. Otherwise, return |
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107 // banged address. |
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108 return MacroAssembler::get_stack_bang_address(long_at(0), ucontext); |
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109 } |
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110 |
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111 protected: |
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112 address addr_at(int offset) const { return address(this) + offset; } |
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113 int long_at(int offset) const { return *(int*)addr_at(offset); } |
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114 |
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115 public: |
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116 void verify() NOT_DEBUG_RETURN; |
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117 }; |
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118 |
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119 inline NativeInstruction* nativeInstruction_at(address address) { |
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120 NativeInstruction* inst = (NativeInstruction*)address; |
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121 inst->verify(); |
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122 return inst; |
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123 } |
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124 |
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125 // The NativeCall is an abstraction for accessing/manipulating call |
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126 // instructions. It is used to manipulate inline caches, primitive & |
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127 // dll calls, etc. |
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128 // |
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129 // Sparc distinguishes `NativeCall' and `NativeFarCall'. On PPC64, |
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130 // at present, we provide a single class `NativeCall' representing the |
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131 // sequence `load_const, mtctr, bctrl' or the sequence 'ld_from_toc, |
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132 // mtctr, bctrl'. |
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133 class NativeCall: public NativeInstruction { |
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134 public: |
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135 |
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136 enum ppc_specific_constants { |
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137 load_const_instruction_size = 28, |
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138 load_const_from_method_toc_instruction_size = 16, |
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139 instruction_size = 16 // Used in shared code for calls with reloc_info. |
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140 }; |
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141 |
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142 static bool is_call_at(address a) { |
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143 return Assembler::is_bl(*(int*)(a)); |
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144 } |
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145 |
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146 static bool is_call_before(address return_address) { |
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147 return NativeCall::is_call_at(return_address - 4); |
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148 } |
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149 |
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150 address instruction_address() const { |
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151 return addr_at(0); |
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152 } |
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153 |
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154 address next_instruction_address() const { |
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155 // We have only bl. |
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156 assert(MacroAssembler::is_bl(*(int*)instruction_address()), "Should be bl instruction!"); |
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157 return addr_at(4); |
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158 } |
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159 |
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160 address return_address() const { |
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161 return next_instruction_address(); |
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162 } |
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163 |
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164 address destination() const; |
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165 |
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166 // The parameter assert_lock disables the assertion during code generation. |
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167 void set_destination_mt_safe(address dest, bool assert_lock = true); |
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168 |
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169 address get_trampoline(); |
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170 |
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171 void verify_alignment() {} // do nothing on ppc |
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172 void verify() NOT_DEBUG_RETURN; |
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173 }; |
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174 |
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175 inline NativeCall* nativeCall_at(address instr) { |
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176 NativeCall* call = (NativeCall*)instr; |
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177 call->verify(); |
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178 return call; |
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179 } |
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180 |
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181 inline NativeCall* nativeCall_before(address return_address) { |
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182 NativeCall* call = NULL; |
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183 if (MacroAssembler::is_bl(*(int*)(return_address - 4))) |
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184 call = (NativeCall*)(return_address - 4); |
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185 call->verify(); |
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186 return call; |
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187 } |
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188 |
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189 // The NativeFarCall is an abstraction for accessing/manipulating native |
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190 // call-anywhere instructions. |
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191 // Used to call native methods which may be loaded anywhere in the address |
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192 // space, possibly out of reach of a call instruction. |
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193 class NativeFarCall: public NativeInstruction { |
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194 public: |
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195 // We use MacroAssembler::bl64_patchable() for implementing a |
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196 // call-anywhere instruction. |
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197 |
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198 // Checks whether instr points at a NativeFarCall instruction. |
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199 static bool is_far_call_at(address instr) { |
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200 return MacroAssembler::is_bl64_patchable_at(instr); |
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201 } |
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202 |
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203 // Does the NativeFarCall implementation use a pc-relative encoding |
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204 // of the call destination? |
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205 // Used when relocating code. |
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206 bool is_pcrelative() { |
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207 assert(MacroAssembler::is_bl64_patchable_at((address)this), |
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208 "unexpected call type"); |
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209 return MacroAssembler::is_bl64_patchable_pcrelative_at((address)this); |
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210 } |
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211 |
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212 // Returns the NativeFarCall's destination. |
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213 address destination() const { |
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214 assert(MacroAssembler::is_bl64_patchable_at((address)this), |
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215 "unexpected call type"); |
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216 return MacroAssembler::get_dest_of_bl64_patchable_at((address)this); |
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217 } |
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218 |
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219 // Sets the NativeCall's destination, not necessarily mt-safe. |
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220 // Used when relocating code. |
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221 void set_destination(address dest) { |
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222 // Set new destination (implementation of call may change here). |
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223 assert(MacroAssembler::is_bl64_patchable_at((address)this), |
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224 "unexpected call type"); |
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225 MacroAssembler::set_dest_of_bl64_patchable_at((address)this, dest); |
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226 } |
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227 |
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228 void verify() NOT_DEBUG_RETURN; |
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229 }; |
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230 |
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231 // Instantiates a NativeFarCall object starting at the given instruction |
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232 // address and returns the NativeFarCall object. |
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233 inline NativeFarCall* nativeFarCall_at(address instr) { |
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234 NativeFarCall* call = (NativeFarCall*)instr; |
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235 call->verify(); |
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236 return call; |
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237 } |
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238 |
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239 // An interface for accessing/manipulating native set_oop imm, reg instructions |
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240 // (used to manipulate inlined data references, etc.). |
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241 class NativeMovConstReg: public NativeInstruction { |
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242 public: |
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243 |
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244 enum ppc_specific_constants { |
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245 load_const_instruction_size = 20, |
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246 load_const_from_method_toc_instruction_size = 8, |
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247 instruction_size = 8 // Used in shared code for calls with reloc_info. |
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248 }; |
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249 |
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250 address instruction_address() const { |
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251 return addr_at(0); |
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252 } |
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253 |
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254 address next_instruction_address() const; |
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255 |
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256 // (The [set_]data accessor respects oop_type relocs also.) |
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257 intptr_t data() const; |
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258 |
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259 // Patch the code stream. |
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260 address set_data_plain(intptr_t x, CodeBlob *code); |
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261 // Patch the code stream and oop pool. |
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262 void set_data(intptr_t x); |
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263 |
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264 // Patch narrow oop constants. Use this also for narrow klass. |
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265 void set_narrow_oop(narrowOop data, CodeBlob *code = NULL); |
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266 |
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267 void verify() NOT_DEBUG_RETURN; |
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268 }; |
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269 |
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270 inline NativeMovConstReg* nativeMovConstReg_at(address address) { |
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271 NativeMovConstReg* test = (NativeMovConstReg*)address; |
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272 test->verify(); |
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273 return test; |
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274 } |
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275 |
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276 // The NativeJump is an abstraction for accessing/manipulating native |
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277 // jump-anywhere instructions. |
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278 class NativeJump: public NativeInstruction { |
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279 public: |
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280 // We use MacroAssembler::b64_patchable() for implementing a |
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281 // jump-anywhere instruction. |
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282 |
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283 enum ppc_specific_constants { |
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284 instruction_size = MacroAssembler::b64_patchable_size |
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285 }; |
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286 |
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287 // Checks whether instr points at a NativeJump instruction. |
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288 static bool is_jump_at(address instr) { |
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289 return MacroAssembler::is_b64_patchable_at(instr) |
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290 || ( MacroAssembler::is_load_const_from_method_toc_at(instr) |
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291 && Assembler::is_mtctr(*(int*)(instr + 2 * 4)) |
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292 && Assembler::is_bctr(*(int*)(instr + 3 * 4))); |
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293 } |
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294 |
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295 // Does the NativeJump implementation use a pc-relative encoding |
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296 // of the call destination? |
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297 // Used when relocating code or patching jumps. |
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298 bool is_pcrelative() { |
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299 return MacroAssembler::is_b64_patchable_pcrelative_at((address)this); |
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300 } |
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301 |
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302 // Returns the NativeJump's destination. |
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303 address jump_destination() const { |
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304 if (MacroAssembler::is_b64_patchable_at((address)this)) { |
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305 return MacroAssembler::get_dest_of_b64_patchable_at((address)this); |
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306 } else if (MacroAssembler::is_load_const_from_method_toc_at((address)this) |
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307 && Assembler::is_mtctr(*(int*)((address)this + 2 * 4)) |
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308 && Assembler::is_bctr(*(int*)((address)this + 3 * 4))) { |
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309 return (address)((NativeMovConstReg *)this)->data(); |
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310 } else { |
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311 ShouldNotReachHere(); |
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312 return NULL; |
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313 } |
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314 } |
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315 |
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316 // Sets the NativeJump's destination, not necessarily mt-safe. |
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317 // Used when relocating code or patching jumps. |
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318 void set_jump_destination(address dest) { |
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319 // Set new destination (implementation of call may change here). |
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320 if (MacroAssembler::is_b64_patchable_at((address)this)) { |
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321 MacroAssembler::set_dest_of_b64_patchable_at((address)this, dest); |
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322 } else if (MacroAssembler::is_load_const_from_method_toc_at((address)this) |
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323 && Assembler::is_mtctr(*(int*)((address)this + 2 * 4)) |
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324 && Assembler::is_bctr(*(int*)((address)this + 3 * 4))) { |
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325 ((NativeMovConstReg *)this)->set_data((intptr_t)dest); |
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326 } else { |
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327 ShouldNotReachHere(); |
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328 } |
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329 } |
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330 |
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331 // MT-safe insertion of native jump at verified method entry |
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332 static void patch_verified_entry(address entry, address verified_entry, address dest); |
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333 |
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334 void verify() NOT_DEBUG_RETURN; |
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335 |
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336 static void check_verified_entry_alignment(address entry, address verified_entry) { |
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337 // We just patch one instruction on ppc64, so the jump doesn't have to |
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338 // be aligned. Nothing to do here. |
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339 } |
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340 }; |
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341 |
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342 // Instantiates a NativeJump object starting at the given instruction |
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343 // address and returns the NativeJump object. |
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344 inline NativeJump* nativeJump_at(address instr) { |
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345 NativeJump* call = (NativeJump*)instr; |
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346 call->verify(); |
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347 return call; |
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348 } |
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349 |
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350 // NativeConditionalFarBranch is abstraction for accessing/manipulating |
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351 // conditional far branches. |
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352 class NativeConditionalFarBranch : public NativeInstruction { |
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353 public: |
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354 |
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355 static bool is_conditional_far_branch_at(address instr) { |
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356 return MacroAssembler::is_bc_far_at(instr); |
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357 } |
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358 |
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359 address branch_destination() const { |
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360 return MacroAssembler::get_dest_of_bc_far_at((address)this); |
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361 } |
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362 |
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363 void set_branch_destination(address dest) { |
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364 MacroAssembler::set_dest_of_bc_far_at((address)this, dest); |
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365 } |
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366 }; |
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367 |
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368 inline NativeConditionalFarBranch* NativeConditionalFarBranch_at(address address) { |
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369 assert(NativeConditionalFarBranch::is_conditional_far_branch_at(address), |
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370 "must be a conditional far branch"); |
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371 return (NativeConditionalFarBranch*)address; |
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372 } |
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373 |
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374 // Call trampoline stubs. |
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375 class NativeCallTrampolineStub : public NativeInstruction { |
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376 private: |
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377 |
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378 address encoded_destination_addr() const; |
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379 |
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380 public: |
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381 |
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382 address destination(nmethod *nm = NULL) const; |
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383 int destination_toc_offset() const; |
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384 |
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385 void set_destination(address new_destination); |
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386 }; |
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387 |
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388 // Note: Other stubs must not begin with this pattern. |
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389 inline bool is_NativeCallTrampolineStub_at(address address) { |
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390 int first_instr = *(int*)address; |
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391 // calculate_address_from_global_toc and long form of ld_largeoffset_unchecked begin with addis with target R12 |
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392 if (Assembler::is_addis(first_instr) && |
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393 (Register)(intptr_t)Assembler::inv_rt_field(first_instr) == R12_scratch2) return true; |
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394 |
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395 // short form of ld_largeoffset_unchecked is ld which is followed by mtctr |
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396 int second_instr = *((int*)address + 1); |
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397 if (Assembler::is_ld(first_instr) && |
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398 (Register)(intptr_t)Assembler::inv_rt_field(first_instr) == R12_scratch2 && |
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399 Assembler::is_mtctr(second_instr) && |
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400 (Register)(intptr_t)Assembler::inv_rs_field(second_instr) == R12_scratch2) return true; |
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401 |
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402 return false; |
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403 } |
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404 |
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405 inline NativeCallTrampolineStub* NativeCallTrampolineStub_at(address address) { |
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406 assert(is_NativeCallTrampolineStub_at(address), "no call trampoline found"); |
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407 return (NativeCallTrampolineStub*)address; |
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408 } |
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409 |
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410 /////////////////////////////////////////////////////////////////////////////////////////////////// |
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411 |
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412 //------------------------------------- |
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413 // N a t i v e G e n e r a l J u m p |
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414 //------------------------------------- |
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415 |
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416 // Despite the name, handles only simple branches. |
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417 class NativeGeneralJump; |
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418 inline NativeGeneralJump* nativeGeneralJump_at(address address); |
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419 |
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420 // Currently only implemented as single unconditional branch. |
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421 class NativeGeneralJump: public NativeInstruction { |
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422 public: |
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423 |
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424 enum PPC64_specific_constants { |
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425 instruction_size = 4 |
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426 }; |
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427 |
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428 address instruction_address() const { return addr_at(0); } |
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429 |
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430 // Creation. |
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431 friend inline NativeGeneralJump* nativeGeneralJump_at(address addr) { |
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432 NativeGeneralJump* jump = (NativeGeneralJump*)(addr); |
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433 DEBUG_ONLY( jump->verify(); ) |
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434 return jump; |
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435 } |
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436 |
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437 // Insertion of native general jump instruction. |
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438 static void insert_unconditional(address code_pos, address entry); |
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439 |
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440 address jump_destination() const { |
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441 DEBUG_ONLY( verify(); ) |
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442 return addr_at(0) + Assembler::inv_li_field(long_at(0)); |
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443 } |
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444 |
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445 void set_jump_destination(address dest) { |
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446 DEBUG_ONLY( verify(); ) |
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447 insert_unconditional(addr_at(0), dest); |
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448 } |
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449 |
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450 static void replace_mt_safe(address instr_addr, address code_buffer); |
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451 |
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452 void verify() const { guarantee(Assembler::is_b(long_at(0)), "invalid NativeGeneralJump"); } |
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453 }; |
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454 |
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455 // An interface for accessing/manipulating native load int (load_const32). |
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456 class NativeMovRegMem; |
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457 inline NativeMovRegMem* nativeMovRegMem_at(address address); |
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458 class NativeMovRegMem: public NativeInstruction { |
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459 public: |
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460 |
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461 enum PPC64_specific_constants { |
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462 instruction_size = 8 |
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463 }; |
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464 |
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465 address instruction_address() const { return addr_at(0); } |
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466 |
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467 intptr_t offset() const { |
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468 #ifdef VM_LITTLE_ENDIAN |
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469 short *hi_ptr = (short*)(addr_at(0)); |
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470 short *lo_ptr = (short*)(addr_at(4)); |
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471 #else |
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472 short *hi_ptr = (short*)(addr_at(0) + 2); |
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473 short *lo_ptr = (short*)(addr_at(4) + 2); |
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474 #endif |
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475 return ((*hi_ptr) << 16) | ((*lo_ptr) & 0xFFFF); |
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476 } |
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477 |
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478 void set_offset(intptr_t x) { |
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479 #ifdef VM_LITTLE_ENDIAN |
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480 short *hi_ptr = (short*)(addr_at(0)); |
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481 short *lo_ptr = (short*)(addr_at(4)); |
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482 #else |
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483 short *hi_ptr = (short*)(addr_at(0) + 2); |
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484 short *lo_ptr = (short*)(addr_at(4) + 2); |
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485 #endif |
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486 *hi_ptr = x >> 16; |
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487 *lo_ptr = x & 0xFFFF; |
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488 ICache::ppc64_flush_icache_bytes(addr_at(0), NativeMovRegMem::instruction_size); |
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489 } |
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490 |
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491 void add_offset_in_bytes(intptr_t radd_offset) { |
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492 set_offset(offset() + radd_offset); |
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493 } |
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494 |
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495 void verify() const { |
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496 guarantee(Assembler::is_lis(long_at(0)), "load_const32 1st instr"); |
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497 guarantee(Assembler::is_ori(long_at(4)), "load_const32 2nd instr"); |
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498 } |
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499 |
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500 private: |
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501 friend inline NativeMovRegMem* nativeMovRegMem_at(address address) { |
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502 NativeMovRegMem* test = (NativeMovRegMem*)address; |
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503 DEBUG_ONLY( test->verify(); ) |
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504 return test; |
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505 } |
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506 }; |
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507 |
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508 #endif // CPU_PPC_VM_NATIVEINST_PPC_HPP |