2861   %}

  2861   %}

  2862   ins_pipe(pipe_slow);

  2862   ins_pipe(pipe_slow);

  2863 %}

  2863 %}

  2864 

  2864 

  2865 

  2865 

  2866 instruct roundD_reg(legRegD dst, legRegD src, immU8 rmode) %{

  2867 instruct roundD_reg(legRegD dst, legRegD src, immU8 rmode) %{

  2867   predicate(UseSSE>=4);

  2868   predicate(UseSSE>=4);

  2868   match(Set dst (RoundDoubleMode src rmode));

  2869   match(Set dst (RoundDoubleMode src rmode));

  2869   format %{ "roundsd  $dst, $src" %}

  2870   format %{ "roundsd  $dst, $src" %}

  2870   ins_cost(150);

  2871   ins_cost(150);

  2961     int vector_len = 2;

  2962     int vector_len = 2;

  2962     __ vrndscalepd($dst$$XMMRegister, $mem$$Address, $rmode$$constant, vector_len);

  2963     __ vrndscalepd($dst$$XMMRegister, $mem$$Address, $rmode$$constant, vector_len);

  2963   %}

  2964   %}

  2964   ins_pipe( pipe_slow );

  2965   ins_pipe( pipe_slow );

  2965 %}

  2966 %}

  2966 

  2968 

  2967 instruct onspinwait() %{

  2969 instruct onspinwait() %{

  2968   match(OnSpinWait);

  2970   match(OnSpinWait);

  2969   ins_cost(200);

  2971   ins_cost(200);

  2970 

  2972