src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp
changeset 50641 66aa15778c5a
parent 50599 ecc2af326b5f
child 50644 409bfb0c071e
equal deleted inserted replaced
50640:a92d5b312116 50641:66aa15778c5a
  2568   patch_end[-1] = calltype;
  2568   patch_end[-1] = calltype;
  2569 }
  2569 }
  2570 #endif
  2570 #endif
  2571 
  2571 
  2572 void MacroAssembler::push_call_clobbered_registers() {
  2572 void MacroAssembler::push_call_clobbered_registers() {
       
  2573   int step = 4 * wordSize;
  2573   push(RegSet::range(r0, r18) - RegSet::of(rscratch1, rscratch2), sp);
  2574   push(RegSet::range(r0, r18) - RegSet::of(rscratch1, rscratch2), sp);
  2574 
  2575   sub(sp, sp, step);
       
  2576   mov(rscratch1, -step);
  2575   // Push v0-v7, v16-v31.
  2577   // Push v0-v7, v16-v31.
  2576   for (int i = 30; i >= 0; i -= 2) {
  2578   for (int i = 31; i>= 4; i -= 4) {
  2577     if (i <= v7->encoding() || i >= v16->encoding()) {
  2579     if (i <= v7->encoding() || i >= v16->encoding())
  2578         stpd(as_FloatRegister(i), as_FloatRegister(i+1),
  2580       st1(as_FloatRegister(i-3), as_FloatRegister(i-2), as_FloatRegister(i-1),
  2579              Address(pre(sp, -2 * wordSize)));
  2581           as_FloatRegister(i), T1D, Address(post(sp, rscratch1)));
  2580     }
  2582   }
  2581   }
  2583   st1(as_FloatRegister(0), as_FloatRegister(1), as_FloatRegister(2),
       
  2584       as_FloatRegister(3), T1D, Address(sp));
  2582 }
  2585 }
  2583 
  2586 
  2584 void MacroAssembler::pop_call_clobbered_registers() {
  2587 void MacroAssembler::pop_call_clobbered_registers() {
  2585 
  2588   for (int i = 0; i < 32; i += 4) {
  2586   for (int i = 0; i < 32; i += 2) {
  2589     if (i <= v7->encoding() || i >= v16->encoding())
  2587     if (i <= v7->encoding() || i >= v16->encoding()) {
  2590       ld1(as_FloatRegister(i), as_FloatRegister(i+1), as_FloatRegister(i+2),
  2588       ldpd(as_FloatRegister(i), as_FloatRegister(i+1),
  2591           as_FloatRegister(i+3), T1D, Address(post(sp, 4 * wordSize)));
  2589            Address(post(sp, 2 * wordSize)));
       
  2590     }
       
  2591   }
  2592   }
  2592 
  2593 
  2593   pop(RegSet::range(r0, r18) - RegSet::of(rscratch1, rscratch2), sp);
  2594   pop(RegSet::range(r0, r18) - RegSet::of(rscratch1, rscratch2), sp);
  2594 }
  2595 }
  2595 
  2596 
  2596 void MacroAssembler::push_CPU_state(bool save_vectors) {
  2597 void MacroAssembler::push_CPU_state(bool save_vectors) {
       
  2598   int step = (save_vectors ? 8 : 4) * wordSize;
  2597   push(0x3fffffff, sp);         // integer registers except lr & sp
  2599   push(0x3fffffff, sp);         // integer registers except lr & sp
  2598 
  2600   mov(rscratch1, -step);
  2599   if (!save_vectors) {
  2601   sub(sp, sp, step);
  2600     for (int i = 30; i >= 0; i -= 2)
  2602   for (int i = 28; i >= 4; i -= 4) {
  2601       stpd(as_FloatRegister(i), as_FloatRegister(i+1),
  2603     st1(as_FloatRegister(i), as_FloatRegister(i+1), as_FloatRegister(i+2),
  2602            Address(pre(sp, -2 * wordSize)));
  2604         as_FloatRegister(i+3), save_vectors ? T2D : T1D, Address(post(sp, rscratch1)));
  2603   } else {
  2605   }
  2604     for (int i = 30; i >= 0; i -= 2)
  2606   st1(v0, v1, v2, v3, save_vectors ? T2D : T1D, sp);
  2605       stpq(as_FloatRegister(i), as_FloatRegister(i+1),
       
  2606            Address(pre(sp, -4 * wordSize)));
       
  2607   }
       
  2608 }
  2607 }
  2609 
  2608 
  2610 void MacroAssembler::pop_CPU_state(bool restore_vectors) {
  2609 void MacroAssembler::pop_CPU_state(bool restore_vectors) {
  2611   if (!restore_vectors) {
  2610   int step = (restore_vectors ? 8 : 4) * wordSize;
  2612     for (int i = 0; i < 32; i += 2)
  2611   for (int i = 0; i <= 28; i += 4)
  2613       ldpd(as_FloatRegister(i), as_FloatRegister(i+1),
  2612     ld1(as_FloatRegister(i), as_FloatRegister(i+1), as_FloatRegister(i+2),
  2614            Address(post(sp, 2 * wordSize)));
  2613         as_FloatRegister(i+3), restore_vectors ? T2D : T1D, Address(post(sp, step)));
  2615   } else {
       
  2616     for (int i = 0; i < 32; i += 2)
       
  2617       ldpq(as_FloatRegister(i), as_FloatRegister(i+1),
       
  2618            Address(post(sp, 4 * wordSize)));
       
  2619   }
       
  2620 
       
  2621   pop(0x3fffffff, sp);         // integer registers except lr & sp
  2614   pop(0x3fffffff, sp);         // integer registers except lr & sp
  2622 }
  2615 }
  2623 
  2616 
  2624 /**
  2617 /**
  2625  * Helpers for multiply_to_len().
  2618  * Helpers for multiply_to_len().