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1 /* |
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2 * Copyright (c) 2016, Oracle and/or its affiliates. All rights reserved. |
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3 * Copyright (c) 2016 SAP SE. All rights reserved. |
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4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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5 * |
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6 * This code is free software; you can redistribute it and/or modify it |
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7 * under the terms of the GNU General Public License version 2 only, as |
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8 * published by the Free Software Foundation. |
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9 * |
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10 * This code is distributed in the hope that it will be useful, but WITHOUT |
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11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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13 * version 2 for more details (a copy is included in the LICENSE file that |
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14 * accompanied this code). |
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15 * |
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16 * You should have received a copy of the GNU General Public License version |
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17 * 2 along with this work; if not, write to the Free Software Foundation, |
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18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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19 * |
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20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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21 * or visit www.oracle.com if you need additional information or have any |
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22 * questions. |
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23 * |
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24 */ |
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25 |
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26 #include "precompiled.hpp" |
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27 #include "c1/c1_Compilation.hpp" |
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28 #include "c1/c1_FrameMap.hpp" |
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29 #include "c1/c1_Instruction.hpp" |
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30 #include "c1/c1_LIRAssembler.hpp" |
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31 #include "c1/c1_LIRGenerator.hpp" |
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32 #include "c1/c1_Runtime1.hpp" |
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33 #include "c1/c1_ValueStack.hpp" |
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34 #include "ci/ciArray.hpp" |
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35 #include "ci/ciObjArrayKlass.hpp" |
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36 #include "ci/ciTypeArrayKlass.hpp" |
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37 #include "runtime/sharedRuntime.hpp" |
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38 #include "runtime/stubRoutines.hpp" |
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39 #include "vmreg_s390.inline.hpp" |
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40 |
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41 #ifdef ASSERT |
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42 #define __ gen()->lir(__FILE__, __LINE__)-> |
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43 #else |
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44 #define __ gen()->lir()-> |
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45 #endif |
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46 |
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47 void LIRItem::load_byte_item() { |
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48 // Byte loads use same registers as other loads. |
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49 load_item(); |
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50 } |
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51 |
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52 void LIRItem::load_nonconstant(int bits) { |
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53 LIR_Opr r = value()->operand(); |
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54 if (_gen->can_inline_as_constant(value(), bits)) { |
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55 if (!r->is_constant()) { |
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56 r = LIR_OprFact::value_type(value()->type()); |
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57 } |
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58 _result = r; |
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59 } else { |
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60 load_item(); |
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61 } |
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62 } |
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63 |
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64 inline void load_int_as_long(LIR_List *ll, LIRItem &li, LIR_Opr dst) { |
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65 LIR_Opr r = li.value()->operand(); |
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66 if (r->is_constant()) { |
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67 // Constants get loaded with sign extend on this platform. |
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68 ll->move(li.result(), dst); |
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69 } else { |
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70 if (!r->is_register()) { |
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71 li.load_item_force(dst); |
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72 } |
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73 LIR_Opr dst_l = FrameMap::as_long_opr(dst->as_register()); |
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74 ll->convert(Bytecodes::_i2l, li.result(), dst_l); // Convert. |
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75 } |
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76 } |
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77 |
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78 //-------------------------------------------------------------- |
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79 // LIRGenerator |
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80 //-------------------------------------------------------------- |
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81 |
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82 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::as_oop_opr(Z_EXC_OOP); } |
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83 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::as_opr(Z_EXC_PC); } |
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84 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::Z_R11_opr; } |
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85 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::Z_R11_opr; } |
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86 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::Z_R10_opr; } |
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87 LIR_Opr LIRGenerator::ldivInOpr() { return FrameMap::Z_R11_long_opr; } |
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88 LIR_Opr LIRGenerator::ldivOutOpr() { return FrameMap::Z_R11_long_opr; } |
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89 LIR_Opr LIRGenerator::lremOutOpr() { return FrameMap::Z_R10_long_opr; } |
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90 LIR_Opr LIRGenerator::syncLockOpr() { return new_register(T_INT); } |
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91 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::Z_R13_opr; } |
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92 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; } |
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93 |
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94 LIR_Opr LIRGenerator::result_register_for (ValueType* type, bool callee) { |
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95 LIR_Opr opr; |
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96 switch (type->tag()) { |
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97 case intTag: opr = FrameMap::Z_R2_opr; break; |
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98 case objectTag: opr = FrameMap::Z_R2_oop_opr; break; |
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99 case longTag: opr = FrameMap::Z_R2_long_opr; break; |
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100 case floatTag: opr = FrameMap::Z_F0_opr; break; |
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101 case doubleTag: opr = FrameMap::Z_F0_double_opr; break; |
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102 |
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103 case addressTag: |
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104 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr; |
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105 } |
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106 |
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107 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch"); |
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108 return opr; |
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109 } |
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110 |
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111 LIR_Opr LIRGenerator::rlock_byte(BasicType type) { |
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112 return new_register(T_INT); |
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113 } |
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114 |
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115 //--------- Loading items into registers. -------------------------------- |
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116 |
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117 // z/Architecture cannot inline all constants. |
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118 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const { |
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119 if (v->type()->as_IntConstant() != NULL) { |
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120 return Immediate::is_simm16(v->type()->as_IntConstant()->value()); |
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121 } else if (v->type()->as_LongConstant() != NULL) { |
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122 return Immediate::is_simm16(v->type()->as_LongConstant()->value()); |
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123 } else if (v->type()->as_ObjectConstant() != NULL) { |
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124 return v->type()->as_ObjectConstant()->value()->is_null_object(); |
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125 } else { |
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126 return false; |
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127 } |
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128 } |
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129 |
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130 bool LIRGenerator::can_inline_as_constant(Value i, int bits) const { |
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131 if (i->type()->as_IntConstant() != NULL) { |
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132 return Assembler::is_simm(i->type()->as_IntConstant()->value(), bits); |
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133 } else if (i->type()->as_LongConstant() != NULL) { |
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134 return Assembler::is_simm(i->type()->as_LongConstant()->value(), bits); |
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135 } else { |
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136 return can_store_as_constant(i, as_BasicType(i->type())); |
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137 } |
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138 } |
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139 |
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140 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const { |
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141 if (c->type() == T_INT) { |
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142 return Immediate::is_simm20(c->as_jint()); |
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143 } else if (c->type() == T_LONG) { |
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144 return Immediate::is_simm20(c->as_jlong()); |
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145 } |
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146 return false; |
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147 } |
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148 |
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149 LIR_Opr LIRGenerator::safepoint_poll_register() { |
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150 return new_register(longType); |
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151 } |
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152 |
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153 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index, |
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154 int shift, int disp, BasicType type) { |
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155 assert(base->is_register(), "must be"); |
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156 if (index->is_constant()) { |
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157 intptr_t large_disp = ((intx)(index->as_constant_ptr()->as_jint()) << shift) + disp; |
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158 if (Displacement::is_validDisp(large_disp)) { |
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159 return new LIR_Address(base, large_disp, type); |
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160 } |
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161 // Index is illegal so replace it with the displacement loaded into a register. |
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162 index = new_pointer_register(); |
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163 __ move(LIR_OprFact::intptrConst(large_disp), index); |
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164 return new LIR_Address(base, index, type); |
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165 } else { |
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166 if (shift > 0) { |
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167 LIR_Opr tmp = new_pointer_register(); |
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168 __ shift_left(index, shift, tmp); |
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169 index = tmp; |
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170 } |
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171 return new LIR_Address(base, index, disp, type); |
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172 } |
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173 } |
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174 |
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175 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr, |
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176 BasicType type, bool needs_card_mark) { |
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177 int elem_size = type2aelembytes(type); |
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178 int shift = exact_log2(elem_size); |
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179 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type); |
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180 |
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181 LIR_Address* addr; |
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182 if (index_opr->is_constant()) { |
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183 addr = new LIR_Address(array_opr, |
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184 offset_in_bytes + (intx)(index_opr->as_jint()) * elem_size, type); |
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185 } else { |
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186 if (index_opr->type() == T_INT) { |
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187 LIR_Opr tmp = new_register(T_LONG); |
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188 __ convert(Bytecodes::_i2l, index_opr, tmp); |
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189 index_opr = tmp; |
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190 } |
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191 if (shift > 0) { |
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192 __ shift_left(index_opr, shift, index_opr); |
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193 } |
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194 addr = new LIR_Address(array_opr, |
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195 index_opr, |
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196 offset_in_bytes, type); |
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197 } |
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198 if (needs_card_mark) { |
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199 // This store will need a precise card mark, so go ahead and |
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200 // compute the full adddres instead of computing once for the |
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201 // store and again for the card mark. |
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202 LIR_Opr tmp = new_pointer_register(); |
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203 __ leal(LIR_OprFact::address(addr), tmp); |
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204 return new LIR_Address(tmp, type); |
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205 } else { |
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206 return addr; |
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207 } |
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208 } |
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209 |
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210 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) { |
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211 LIR_Opr r = LIR_OprFact::illegalOpr; |
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212 if (type == T_LONG) { |
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213 r = LIR_OprFact::longConst(x); |
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214 } else if (type == T_INT) { |
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215 r = LIR_OprFact::intConst(x); |
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216 } else { |
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217 ShouldNotReachHere(); |
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218 } |
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219 return r; |
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220 } |
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221 |
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222 void LIRGenerator::increment_counter(address counter, BasicType type, int step) { |
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223 LIR_Opr pointer = new_pointer_register(); |
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224 __ move(LIR_OprFact::intptrConst(counter), pointer); |
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225 LIR_Address* addr = new LIR_Address(pointer, type); |
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226 increment_counter(addr, step); |
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227 } |
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228 |
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229 void LIRGenerator::increment_counter(LIR_Address* addr, int step) { |
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230 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr); |
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231 } |
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232 |
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233 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { |
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234 LIR_Opr scratch = FrameMap::Z_R1_opr; |
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235 __ load(new LIR_Address(base, disp, T_INT), scratch, info); |
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236 __ cmp(condition, scratch, c); |
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237 } |
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238 |
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239 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) { |
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240 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info); |
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241 } |
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242 |
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243 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) { |
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244 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info); |
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245 } |
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246 |
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247 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) { |
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248 if (tmp->is_valid()) { |
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249 if (is_power_of_2(c + 1)) { |
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250 __ move(left, tmp); |
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251 __ shift_left(left, log2_intptr(c + 1), left); |
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252 __ sub(left, tmp, result); |
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253 return true; |
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254 } else if (is_power_of_2(c - 1)) { |
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255 __ move(left, tmp); |
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256 __ shift_left(left, log2_intptr(c - 1), left); |
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257 __ add(left, tmp, result); |
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258 return true; |
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259 } |
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260 } |
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261 return false; |
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262 } |
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263 |
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264 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) { |
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265 BasicType type = item->type(); |
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266 __ store(item, new LIR_Address(FrameMap::Z_SP_opr, in_bytes(offset_from_sp), type)); |
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267 } |
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268 |
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269 //---------------------------------------------------------------------- |
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270 // visitor functions |
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271 //---------------------------------------------------------------------- |
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272 |
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273 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) { |
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274 assert(x->is_pinned(),""); |
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275 bool needs_range_check = x->compute_needs_range_check(); |
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276 bool use_length = x->length() != NULL; |
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277 bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT; |
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278 bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL || |
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279 !get_jobject_constant(x->value())->is_null_object() || |
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280 x->should_profile()); |
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281 |
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282 LIRItem array(x->array(), this); |
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283 LIRItem index(x->index(), this); |
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284 LIRItem value(x->value(), this); |
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285 LIRItem length(this); |
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286 |
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287 array.load_item(); |
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288 index.load_nonconstant(20); |
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289 |
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290 if (use_length && needs_range_check) { |
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291 length.set_instruction(x->length()); |
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292 length.load_item(); |
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293 } |
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294 if (needs_store_check) { |
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295 value.load_item(); |
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296 } else { |
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297 value.load_for_store(x->elt_type()); |
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298 } |
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299 |
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300 set_no_result(x); |
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301 |
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302 // The CodeEmitInfo must be duplicated for each different |
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303 // LIR-instruction because spilling can occur anywhere between two |
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304 // instructions and so the debug information must be different. |
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305 CodeEmitInfo* range_check_info = state_for (x); |
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306 CodeEmitInfo* null_check_info = NULL; |
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307 if (x->needs_null_check()) { |
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308 null_check_info = new CodeEmitInfo(range_check_info); |
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309 } |
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310 |
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311 // Emit array address setup early so it schedules better. |
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312 LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store); |
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313 if (value.result()->is_constant() && array_addr->index()->is_valid()) { |
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314 // Constants cannot be stored with index register on ZARCH_64 (see LIR_Assembler::const2mem()). |
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315 LIR_Opr tmp = new_pointer_register(); |
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316 __ leal(LIR_OprFact::address(array_addr), tmp); |
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317 array_addr = new LIR_Address(tmp, x->elt_type()); |
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318 } |
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319 |
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320 if (GenerateRangeChecks && needs_range_check) { |
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321 if (use_length) { |
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322 __ cmp(lir_cond_belowEqual, length.result(), index.result()); |
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323 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result())); |
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324 } else { |
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325 array_range_check(array.result(), index.result(), null_check_info, range_check_info); |
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326 // Range_check also does the null check. |
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327 null_check_info = NULL; |
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328 } |
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329 } |
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330 |
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331 if (GenerateArrayStoreCheck && needs_store_check) { |
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332 LIR_Opr tmp1 = new_register(objectType); |
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333 LIR_Opr tmp2 = new_register(objectType); |
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334 LIR_Opr tmp3 = LIR_OprFact::illegalOpr; |
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335 |
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336 CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info); |
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337 __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info, x->profiled_method(), x->profiled_bci()); |
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338 } |
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339 |
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340 if (obj_store) { |
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341 // Needs GC write barriers. |
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342 pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */, |
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343 true /* do_load */, false /* patch */, NULL); |
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344 __ move(value.result(), array_addr, null_check_info); |
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345 // Seems to be a precise. |
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346 post_barrier(LIR_OprFact::address(array_addr), value.result()); |
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347 } else { |
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348 __ move(value.result(), array_addr, null_check_info); |
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349 } |
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350 } |
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351 |
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352 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) { |
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353 assert(x->is_pinned(),""); |
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354 LIRItem obj(x->obj(), this); |
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355 obj.load_item(); |
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356 |
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357 set_no_result(x); |
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358 |
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359 // "lock" stores the address of the monitor stack slot, so this is not an oop. |
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360 LIR_Opr lock = new_register(T_INT); |
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361 |
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362 CodeEmitInfo* info_for_exception = NULL; |
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363 if (x->needs_null_check()) { |
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364 info_for_exception = state_for (x); |
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365 } |
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366 // This CodeEmitInfo must not have the xhandlers because here the |
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367 // object is already locked (xhandlers expect object to be unlocked). |
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368 CodeEmitInfo* info = state_for (x, x->state(), true); |
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369 monitor_enter(obj.result(), lock, syncTempOpr(), LIR_OprFact::illegalOpr, |
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370 x->monitor_no(), info_for_exception, info); |
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371 } |
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372 |
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373 void LIRGenerator::do_MonitorExit(MonitorExit* x) { |
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374 assert(x->is_pinned(),""); |
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375 |
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376 LIRItem obj(x->obj(), this); |
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377 obj.dont_load_item(); |
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378 |
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379 LIR_Opr lock = new_register(T_INT); |
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380 LIR_Opr obj_temp = new_register(T_INT); |
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381 set_no_result(x); |
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382 monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no()); |
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383 } |
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384 |
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385 // _ineg, _lneg, _fneg, _dneg |
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386 void LIRGenerator::do_NegateOp(NegateOp* x) { |
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387 LIRItem value(x->x(), this); |
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388 value.load_item(); |
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389 LIR_Opr reg = rlock_result(x); |
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390 __ negate(value.result(), reg); |
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391 } |
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392 |
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393 // for _fadd, _fmul, _fsub, _fdiv, _frem |
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394 // _dadd, _dmul, _dsub, _ddiv, _drem |
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395 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) { |
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396 LIRItem left(x->x(), this); |
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397 LIRItem right(x->y(), this); |
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398 LIRItem* left_arg = &left; |
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399 LIRItem* right_arg = &right; |
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400 assert(!left.is_stack(), "can't both be memory operands"); |
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401 left.load_item(); |
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402 |
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403 if (right.is_register() || right.is_constant()) { |
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404 right.load_item(); |
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405 } else { |
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406 right.dont_load_item(); |
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407 } |
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408 |
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409 if ((x->op() == Bytecodes::_frem) || (x->op() == Bytecodes::_drem)) { |
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410 address entry; |
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411 switch (x->op()) { |
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412 case Bytecodes::_frem: |
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413 entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem); |
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414 break; |
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415 case Bytecodes::_drem: |
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416 entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem); |
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417 break; |
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418 default: |
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419 ShouldNotReachHere(); |
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420 } |
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421 LIR_Opr result = call_runtime(x->x(), x->y(), entry, x->type(), NULL); |
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422 set_result(x, result); |
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423 } else { |
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424 LIR_Opr reg = rlock(x); |
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425 LIR_Opr tmp = LIR_OprFact::illegalOpr; |
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426 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp); |
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427 set_result(x, reg); |
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428 } |
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429 } |
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430 |
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431 // for _ladd, _lmul, _lsub, _ldiv, _lrem |
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432 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) { |
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433 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem) { |
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434 // Use shifts if divisior is a power of 2 otherwise use DSGR instruction. |
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435 // Instruction: DSGR R1, R2 |
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436 // input : R1+1: dividend (R1, R1+1 designate a register pair, R1 must be even) |
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437 // R2: divisor |
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438 // |
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439 // output: R1+1: quotient |
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440 // R1: remainder |
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441 // |
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442 // Register selection: R1: Z_R10 |
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443 // R1+1: Z_R11 |
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444 // R2: to be chosen by register allocator (linear scan) |
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445 |
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446 // R1, and R1+1 will be destroyed. |
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447 |
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448 LIRItem right(x->y(), this); |
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449 LIRItem left(x->x() , this); // Visit left second, so that the is_register test is valid. |
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450 |
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451 // Call state_for before load_item_force because state_for may |
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452 // force the evaluation of other instructions that are needed for |
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453 // correct debug info. Otherwise the live range of the fix |
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454 // register might be too long. |
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455 CodeEmitInfo* info = state_for (x); |
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456 |
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457 LIR_Opr result = rlock_result(x); |
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458 LIR_Opr result_reg = result; |
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459 LIR_Opr tmp = LIR_OprFact::illegalOpr; |
|
460 LIR_Opr divisor_opr = right.result(); |
|
461 if (divisor_opr->is_constant() && is_power_of_2(divisor_opr->as_jlong())) { |
|
462 left.load_item(); |
|
463 right.dont_load_item(); |
|
464 } else { |
|
465 left.load_item_force(ldivInOpr()); |
|
466 right.load_item(); |
|
467 |
|
468 // DSGR instruction needs register pair. |
|
469 if (x->op() == Bytecodes::_ldiv) { |
|
470 result_reg = ldivOutOpr(); |
|
471 tmp = lremOutOpr(); |
|
472 } else { |
|
473 result_reg = lremOutOpr(); |
|
474 tmp = ldivOutOpr(); |
|
475 } |
|
476 } |
|
477 |
|
478 if (!ImplicitDiv0Checks) { |
|
479 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0)); |
|
480 __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info)); |
|
481 // Idiv/irem cannot trap (passing info would generate an assertion). |
|
482 info = NULL; |
|
483 } |
|
484 |
|
485 if (x->op() == Bytecodes::_lrem) { |
|
486 __ irem(left.result(), right.result(), result_reg, tmp, info); |
|
487 } else if (x->op() == Bytecodes::_ldiv) { |
|
488 __ idiv(left.result(), right.result(), result_reg, tmp, info); |
|
489 } else { |
|
490 ShouldNotReachHere(); |
|
491 } |
|
492 |
|
493 if (result_reg != result) { |
|
494 __ move(result_reg, result); |
|
495 } |
|
496 } else { |
|
497 LIRItem left(x->x(), this); |
|
498 LIRItem right(x->y(), this); |
|
499 |
|
500 left.load_item(); |
|
501 right.load_nonconstant(32); |
|
502 rlock_result(x); |
|
503 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL); |
|
504 } |
|
505 } |
|
506 |
|
507 // for: _iadd, _imul, _isub, _idiv, _irem |
|
508 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) { |
|
509 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) { |
|
510 // Use shifts if divisior is a power of 2 otherwise use DSGFR instruction. |
|
511 // Instruction: DSGFR R1, R2 |
|
512 // input : R1+1: dividend (R1, R1+1 designate a register pair, R1 must be even) |
|
513 // R2: divisor |
|
514 // |
|
515 // output: R1+1: quotient |
|
516 // R1: remainder |
|
517 // |
|
518 // Register selection: R1: Z_R10 |
|
519 // R1+1: Z_R11 |
|
520 // R2: To be chosen by register allocator (linear scan). |
|
521 |
|
522 // R1, and R1+1 will be destroyed. |
|
523 |
|
524 LIRItem right(x->y(), this); |
|
525 LIRItem left(x->x() , this); // Visit left second, so that the is_register test is valid. |
|
526 |
|
527 // Call state_for before load_item_force because state_for may |
|
528 // force the evaluation of other instructions that are needed for |
|
529 // correct debug info. Otherwise the live range of the fix |
|
530 // register might be too long. |
|
531 CodeEmitInfo* info = state_for (x); |
|
532 |
|
533 LIR_Opr result = rlock_result(x); |
|
534 LIR_Opr result_reg = result; |
|
535 LIR_Opr tmp = LIR_OprFact::illegalOpr; |
|
536 LIR_Opr divisor_opr = right.result(); |
|
537 if (divisor_opr->is_constant() && is_power_of_2(divisor_opr->as_jint())) { |
|
538 left.load_item(); |
|
539 right.dont_load_item(); |
|
540 } else { |
|
541 left.load_item_force(divInOpr()); |
|
542 right.load_item(); |
|
543 |
|
544 // DSGFR instruction needs register pair. |
|
545 if (x->op() == Bytecodes::_idiv) { |
|
546 result_reg = divOutOpr(); |
|
547 tmp = remOutOpr(); |
|
548 } else { |
|
549 result_reg = remOutOpr(); |
|
550 tmp = divOutOpr(); |
|
551 } |
|
552 } |
|
553 |
|
554 if (!ImplicitDiv0Checks) { |
|
555 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0)); |
|
556 __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info)); |
|
557 // Idiv/irem cannot trap (passing info would generate an assertion). |
|
558 info = NULL; |
|
559 } |
|
560 |
|
561 if (x->op() == Bytecodes::_irem) { |
|
562 __ irem(left.result(), right.result(), result_reg, tmp, info); |
|
563 } else if (x->op() == Bytecodes::_idiv) { |
|
564 __ idiv(left.result(), right.result(), result_reg, tmp, info); |
|
565 } else { |
|
566 ShouldNotReachHere(); |
|
567 } |
|
568 |
|
569 if (result_reg != result) { |
|
570 __ move(result_reg, result); |
|
571 } |
|
572 } else { |
|
573 LIRItem left(x->x(), this); |
|
574 LIRItem right(x->y(), this); |
|
575 LIRItem* left_arg = &left; |
|
576 LIRItem* right_arg = &right; |
|
577 if (x->is_commutative() && left.is_stack() && right.is_register()) { |
|
578 // swap them if left is real stack (or cached) and right is real register(not cached) |
|
579 left_arg = &right; |
|
580 right_arg = &left; |
|
581 } |
|
582 |
|
583 left_arg->load_item(); |
|
584 |
|
585 // Do not need to load right, as we can handle stack and constants. |
|
586 if (x->op() == Bytecodes::_imul) { |
|
587 bool use_tmp = false; |
|
588 if (right_arg->is_constant()) { |
|
589 int iconst = right_arg->get_jint_constant(); |
|
590 if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) { |
|
591 use_tmp = true; |
|
592 } |
|
593 } |
|
594 right_arg->dont_load_item(); |
|
595 LIR_Opr tmp = LIR_OprFact::illegalOpr; |
|
596 if (use_tmp) { |
|
597 tmp = new_register(T_INT); |
|
598 } |
|
599 rlock_result(x); |
|
600 |
|
601 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp); |
|
602 } else { |
|
603 right_arg->dont_load_item(); |
|
604 rlock_result(x); |
|
605 LIR_Opr tmp = LIR_OprFact::illegalOpr; |
|
606 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp); |
|
607 } |
|
608 } |
|
609 } |
|
610 |
|
611 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) { |
|
612 // If an operand with use count 1 is the left operand, then it is |
|
613 // likely that no move for 2-operand-LIR-form is necessary. |
|
614 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) { |
|
615 x->swap_operands(); |
|
616 } |
|
617 |
|
618 ValueTag tag = x->type()->tag(); |
|
619 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters"); |
|
620 switch (tag) { |
|
621 case floatTag: |
|
622 case doubleTag: do_ArithmeticOp_FPU(x); return; |
|
623 case longTag: do_ArithmeticOp_Long(x); return; |
|
624 case intTag: do_ArithmeticOp_Int(x); return; |
|
625 } |
|
626 ShouldNotReachHere(); |
|
627 } |
|
628 |
|
629 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr |
|
630 void LIRGenerator::do_ShiftOp(ShiftOp* x) { |
|
631 // count must always be in rcx |
|
632 LIRItem value(x->x(), this); |
|
633 LIRItem count(x->y(), this); |
|
634 |
|
635 ValueTag elemType = x->type()->tag(); |
|
636 bool must_load_count = !count.is_constant(); |
|
637 if (must_load_count) { |
|
638 count.load_item(); |
|
639 } else { |
|
640 count.dont_load_item(); |
|
641 } |
|
642 value.load_item(); |
|
643 LIR_Opr reg = rlock_result(x); |
|
644 |
|
645 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr); |
|
646 } |
|
647 |
|
648 // _iand, _land, _ior, _lor, _ixor, _lxor |
|
649 void LIRGenerator::do_LogicOp(LogicOp* x) { |
|
650 // IF an operand with use count 1 is the left operand, then it is |
|
651 // likely that no move for 2-operand-LIR-form is necessary. |
|
652 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) { |
|
653 x->swap_operands(); |
|
654 } |
|
655 |
|
656 LIRItem left(x->x(), this); |
|
657 LIRItem right(x->y(), this); |
|
658 |
|
659 left.load_item(); |
|
660 right.load_nonconstant(32); |
|
661 LIR_Opr reg = rlock_result(x); |
|
662 |
|
663 logic_op(x->op(), reg, left.result(), right.result()); |
|
664 } |
|
665 |
|
666 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg |
|
667 void LIRGenerator::do_CompareOp(CompareOp* x) { |
|
668 LIRItem left(x->x(), this); |
|
669 LIRItem right(x->y(), this); |
|
670 left.load_item(); |
|
671 right.load_item(); |
|
672 LIR_Opr reg = rlock_result(x); |
|
673 if (x->x()->type()->is_float_kind()) { |
|
674 Bytecodes::Code code = x->op(); |
|
675 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl)); |
|
676 } else if (x->x()->type()->tag() == longTag) { |
|
677 __ lcmp2int(left.result(), right.result(), reg); |
|
678 } else { |
|
679 ShouldNotReachHere(); |
|
680 } |
|
681 } |
|
682 |
|
683 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) { |
|
684 assert(x->number_of_arguments() == 4, "wrong type"); |
|
685 LIRItem obj (x->argument_at(0), this); // object |
|
686 LIRItem offset(x->argument_at(1), this); // offset of field |
|
687 LIRItem cmp (x->argument_at(2), this); // Value to compare with field. |
|
688 LIRItem val (x->argument_at(3), this); // Replace field with val if matches cmp. |
|
689 |
|
690 // Get address of field. |
|
691 obj.load_item(); |
|
692 offset.load_nonconstant(20); |
|
693 cmp.load_item(); |
|
694 val.load_item(); |
|
695 |
|
696 LIR_Opr addr = new_pointer_register(); |
|
697 LIR_Address* a; |
|
698 if (offset.result()->is_constant()) { |
|
699 assert(Immediate::is_simm20(offset.result()->as_jlong()), "should have been loaded into register"); |
|
700 a = new LIR_Address(obj.result(), |
|
701 offset.result()->as_jlong(), |
|
702 as_BasicType(type)); |
|
703 } else { |
|
704 a = new LIR_Address(obj.result(), |
|
705 offset.result(), |
|
706 0, |
|
707 as_BasicType(type)); |
|
708 } |
|
709 __ leal(LIR_OprFact::address(a), addr); |
|
710 |
|
711 if (type == objectType) { // Write-barrier needed for Object fields. |
|
712 pre_barrier(addr, LIR_OprFact::illegalOpr /* pre_val */, |
|
713 true /* do_load */, false /* patch */, NULL); |
|
714 } |
|
715 |
|
716 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience |
|
717 if (type == objectType) { |
|
718 __ cas_obj(addr, cmp.result(), val.result(), new_register(T_OBJECT), new_register(T_OBJECT)); |
|
719 } else if (type == intType) { |
|
720 __ cas_int(addr, cmp.result(), val.result(), ill, ill); |
|
721 } else if (type == longType) { |
|
722 __ cas_long(addr, cmp.result(), val.result(), ill, ill); |
|
723 } else { |
|
724 ShouldNotReachHere(); |
|
725 } |
|
726 // Generate conditional move of boolean result. |
|
727 LIR_Opr result = rlock_result(x); |
|
728 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), |
|
729 result, as_BasicType(type)); |
|
730 if (type == objectType) { // Write-barrier needed for Object fields. |
|
731 // Precise card mark since could either be object or array |
|
732 post_barrier(addr, val.result()); |
|
733 } |
|
734 } |
|
735 |
|
736 |
|
737 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) { |
|
738 switch (x->id()) { |
|
739 case vmIntrinsics::_dabs: |
|
740 case vmIntrinsics::_dsqrt: { |
|
741 assert(x->number_of_arguments() == 1, "wrong type"); |
|
742 LIRItem value(x->argument_at(0), this); |
|
743 value.load_item(); |
|
744 LIR_Opr dst = rlock_result(x); |
|
745 |
|
746 switch (x->id()) { |
|
747 case vmIntrinsics::_dsqrt: { |
|
748 __ sqrt(value.result(), dst, LIR_OprFact::illegalOpr); |
|
749 break; |
|
750 } |
|
751 case vmIntrinsics::_dabs: { |
|
752 __ abs(value.result(), dst, LIR_OprFact::illegalOpr); |
|
753 break; |
|
754 } |
|
755 } |
|
756 break; |
|
757 } |
|
758 case vmIntrinsics::_dlog10: // fall through |
|
759 case vmIntrinsics::_dlog: // fall through |
|
760 case vmIntrinsics::_dsin: // fall through |
|
761 case vmIntrinsics::_dtan: // fall through |
|
762 case vmIntrinsics::_dcos: // fall through |
|
763 case vmIntrinsics::_dexp: { |
|
764 assert(x->number_of_arguments() == 1, "wrong type"); |
|
765 |
|
766 address runtime_entry = NULL; |
|
767 switch (x->id()) { |
|
768 case vmIntrinsics::_dsin: |
|
769 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dsin); |
|
770 break; |
|
771 case vmIntrinsics::_dcos: |
|
772 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dcos); |
|
773 break; |
|
774 case vmIntrinsics::_dtan: |
|
775 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dtan); |
|
776 break; |
|
777 case vmIntrinsics::_dlog: |
|
778 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog); |
|
779 break; |
|
780 case vmIntrinsics::_dlog10: |
|
781 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog10); |
|
782 break; |
|
783 case vmIntrinsics::_dexp: |
|
784 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dexp); |
|
785 break; |
|
786 default: |
|
787 ShouldNotReachHere(); |
|
788 } |
|
789 |
|
790 LIR_Opr result = call_runtime(x->argument_at(0), runtime_entry, x->type(), NULL); |
|
791 set_result(x, result); |
|
792 break; |
|
793 } |
|
794 case vmIntrinsics::_dpow: { |
|
795 assert(x->number_of_arguments() == 2, "wrong type"); |
|
796 address runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dpow); |
|
797 LIR_Opr result = call_runtime(x->argument_at(0), x->argument_at(1), runtime_entry, x->type(), NULL); |
|
798 set_result(x, result); |
|
799 break; |
|
800 } |
|
801 } |
|
802 } |
|
803 |
|
804 void LIRGenerator::do_ArrayCopy(Intrinsic* x) { |
|
805 assert(x->number_of_arguments() == 5, "wrong type"); |
|
806 |
|
807 // Copy stubs possibly call C code, e.g. G1 barriers, so we need to reserve room |
|
808 // for the C ABI (see frame::z_abi_160). |
|
809 BasicTypeArray sig; // Empty signature is precise enough. |
|
810 frame_map()->c_calling_convention(&sig); |
|
811 |
|
812 // Make all state_for calls early since they can emit code. |
|
813 CodeEmitInfo* info = state_for (x, x->state()); |
|
814 |
|
815 LIRItem src(x->argument_at(0), this); |
|
816 LIRItem src_pos(x->argument_at(1), this); |
|
817 LIRItem dst(x->argument_at(2), this); |
|
818 LIRItem dst_pos(x->argument_at(3), this); |
|
819 LIRItem length(x->argument_at(4), this); |
|
820 |
|
821 // Operands for arraycopy must use fixed registers, otherwise |
|
822 // LinearScan will fail allocation (because arraycopy always needs a |
|
823 // call). |
|
824 |
|
825 src.load_item_force (FrameMap::as_oop_opr(Z_ARG1)); |
|
826 src_pos.load_item_force (FrameMap::as_opr(Z_ARG2)); |
|
827 dst.load_item_force (FrameMap::as_oop_opr(Z_ARG3)); |
|
828 dst_pos.load_item_force (FrameMap::as_opr(Z_ARG4)); |
|
829 length.load_item_force (FrameMap::as_opr(Z_ARG5)); |
|
830 |
|
831 LIR_Opr tmp = FrameMap::as_opr(Z_R7); |
|
832 |
|
833 set_no_result(x); |
|
834 |
|
835 int flags; |
|
836 ciArrayKlass* expected_type; |
|
837 arraycopy_helper(x, &flags, &expected_type); |
|
838 |
|
839 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), |
|
840 length.result(), tmp, expected_type, flags, info); // does add_safepoint |
|
841 } |
|
842 |
|
843 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f |
|
844 // _i2b, _i2c, _i2s |
|
845 void LIRGenerator::do_Convert(Convert* x) { |
|
846 LIRItem value(x->value(), this); |
|
847 |
|
848 value.load_item(); |
|
849 LIR_Opr reg = rlock_result(x); |
|
850 __ convert(x->op(), value.result(), reg); |
|
851 } |
|
852 |
|
853 void LIRGenerator::do_NewInstance(NewInstance* x) { |
|
854 print_if_not_loaded(x); |
|
855 |
|
856 // This instruction can be deoptimized in the slow path : use |
|
857 // Z_R2 as result register. |
|
858 const LIR_Opr reg = result_register_for (x->type()); |
|
859 |
|
860 CodeEmitInfo* info = state_for (x, x->state()); |
|
861 LIR_Opr tmp1 = FrameMap::Z_R12_oop_opr; |
|
862 LIR_Opr tmp2 = FrameMap::Z_R13_oop_opr; |
|
863 LIR_Opr tmp3 = reg; |
|
864 LIR_Opr tmp4 = LIR_OprFact::illegalOpr; |
|
865 LIR_Opr klass_reg = FrameMap::Z_R11_metadata_opr; |
|
866 new_instance(reg, x->klass(), x->is_unresolved(), tmp1, tmp2, tmp3, tmp4, klass_reg, info); |
|
867 LIR_Opr result = rlock_result(x); |
|
868 __ move(reg, result); |
|
869 } |
|
870 |
|
871 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) { |
|
872 CodeEmitInfo* info = state_for (x, x->state()); |
|
873 |
|
874 LIRItem length(x->length(), this); |
|
875 length.load_item(); |
|
876 |
|
877 LIR_Opr reg = result_register_for (x->type()); |
|
878 LIR_Opr tmp1 = FrameMap::Z_R12_oop_opr; |
|
879 LIR_Opr tmp2 = FrameMap::Z_R13_oop_opr; |
|
880 LIR_Opr tmp3 = reg; |
|
881 LIR_Opr tmp4 = LIR_OprFact::illegalOpr; |
|
882 LIR_Opr klass_reg = FrameMap::Z_R11_metadata_opr; |
|
883 LIR_Opr len = length.result(); |
|
884 BasicType elem_type = x->elt_type(); |
|
885 |
|
886 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg); |
|
887 |
|
888 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info); |
|
889 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path); |
|
890 |
|
891 LIR_Opr result = rlock_result(x); |
|
892 __ move(reg, result); |
|
893 } |
|
894 |
|
895 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) { |
|
896 // Evaluate state_for early since it may emit code. |
|
897 CodeEmitInfo* info = state_for (x, x->state()); |
|
898 // In case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction |
|
899 // and therefore provide the state before the parameters have been consumed. |
|
900 CodeEmitInfo* patching_info = NULL; |
|
901 if (!x->klass()->is_loaded() || PatchALot) { |
|
902 patching_info = state_for (x, x->state_before()); |
|
903 } |
|
904 |
|
905 LIRItem length(x->length(), this); |
|
906 length.load_item(); |
|
907 |
|
908 const LIR_Opr reg = result_register_for (x->type()); |
|
909 LIR_Opr tmp1 = FrameMap::Z_R12_oop_opr; |
|
910 LIR_Opr tmp2 = FrameMap::Z_R13_oop_opr; |
|
911 LIR_Opr tmp3 = LIR_OprFact::illegalOpr; |
|
912 LIR_Opr tmp4 = LIR_OprFact::illegalOpr; |
|
913 LIR_Opr klass_reg = FrameMap::Z_R11_metadata_opr; |
|
914 LIR_Opr len = length.result(); |
|
915 |
|
916 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info); |
|
917 ciKlass* obj = ciObjArrayKlass::make(x->klass()); |
|
918 if (obj == ciEnv::unloaded_ciobjarrayklass()) { |
|
919 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error"); |
|
920 } |
|
921 klass2reg_with_patching(klass_reg, obj, patching_info); |
|
922 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path); |
|
923 |
|
924 LIR_Opr result = rlock_result(x); |
|
925 __ move(reg, result); |
|
926 } |
|
927 |
|
928 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) { |
|
929 Values* dims = x->dims(); |
|
930 int i = dims->length(); |
|
931 LIRItemList* items = new LIRItemList(i, i, NULL); |
|
932 while (i-- > 0) { |
|
933 LIRItem* size = new LIRItem(dims->at(i), this); |
|
934 items->at_put(i, size); |
|
935 } |
|
936 |
|
937 // Evaluate state_for early since it may emit code. |
|
938 CodeEmitInfo* patching_info = NULL; |
|
939 if (!x->klass()->is_loaded() || PatchALot) { |
|
940 patching_info = state_for (x, x->state_before()); |
|
941 |
|
942 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so |
|
943 // clone all handlers (NOTE: Usually this is handled transparently |
|
944 // by the CodeEmitInfo cloning logic in CodeStub constructors but |
|
945 // is done explicitly here because a stub isn't being used). |
|
946 x->set_exception_handlers(new XHandlers(x->exception_handlers())); |
|
947 } |
|
948 CodeEmitInfo* info = state_for (x, x->state()); |
|
949 |
|
950 i = dims->length(); |
|
951 while (--i >= 0) { |
|
952 LIRItem* size = items->at(i); |
|
953 size->load_nonconstant(32); |
|
954 // FrameMap::_reserved_argument_area_size includes the dimensions varargs, because |
|
955 // it's initialized to hir()->max_stack() when the FrameMap is created. |
|
956 store_stack_parameter(size->result(), in_ByteSize(i*sizeof(jint) + FrameMap::first_available_sp_in_frame)); |
|
957 } |
|
958 |
|
959 LIR_Opr klass_reg = FrameMap::Z_R3_metadata_opr; |
|
960 klass2reg_with_patching(klass_reg, x->klass(), patching_info); |
|
961 |
|
962 LIR_Opr rank = FrameMap::Z_R4_opr; |
|
963 __ move(LIR_OprFact::intConst(x->rank()), rank); |
|
964 LIR_Opr varargs = FrameMap::Z_R5_opr; |
|
965 __ leal(LIR_OprFact::address(new LIR_Address(FrameMap::Z_SP_opr, FrameMap::first_available_sp_in_frame, T_INT)), |
|
966 varargs); |
|
967 LIR_OprList* args = new LIR_OprList(3); |
|
968 args->append(klass_reg); |
|
969 args->append(rank); |
|
970 args->append(varargs); |
|
971 LIR_Opr reg = result_register_for (x->type()); |
|
972 __ call_runtime(Runtime1::entry_for (Runtime1::new_multi_array_id), |
|
973 LIR_OprFact::illegalOpr, |
|
974 reg, args, info); |
|
975 |
|
976 LIR_Opr result = rlock_result(x); |
|
977 __ move(reg, result); |
|
978 } |
|
979 |
|
980 void LIRGenerator::do_BlockBegin(BlockBegin* x) { |
|
981 // Nothing to do. |
|
982 } |
|
983 |
|
984 void LIRGenerator::do_CheckCast(CheckCast* x) { |
|
985 LIRItem obj(x->obj(), this); |
|
986 |
|
987 CodeEmitInfo* patching_info = NULL; |
|
988 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) { |
|
989 // Must do this before locking the destination register as an oop register, |
|
990 // and before the obj is loaded (the latter is for deoptimization). |
|
991 patching_info = state_for (x, x->state_before()); |
|
992 } |
|
993 obj.load_item(); |
|
994 |
|
995 // info for exceptions |
|
996 CodeEmitInfo* info_for_exception = state_for (x); |
|
997 |
|
998 CodeStub* stub; |
|
999 if (x->is_incompatible_class_change_check()) { |
|
1000 assert(patching_info == NULL, "can't patch this"); |
|
1001 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception); |
|
1002 } else { |
|
1003 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception); |
|
1004 } |
|
1005 LIR_Opr reg = rlock_result(x); |
|
1006 LIR_Opr tmp1 = new_register(objectType); |
|
1007 LIR_Opr tmp2 = new_register(objectType); |
|
1008 LIR_Opr tmp3 = LIR_OprFact::illegalOpr; |
|
1009 __ checkcast(reg, obj.result(), x->klass(), |
|
1010 tmp1, tmp2, tmp3, |
|
1011 x->direct_compare(), info_for_exception, patching_info, stub, |
|
1012 x->profiled_method(), x->profiled_bci()); |
|
1013 } |
|
1014 |
|
1015 |
|
1016 void LIRGenerator::do_InstanceOf(InstanceOf* x) { |
|
1017 LIRItem obj(x->obj(), this); |
|
1018 CodeEmitInfo* patching_info = NULL; |
|
1019 if (!x->klass()->is_loaded() || PatchALot) { |
|
1020 patching_info = state_for (x, x->state_before()); |
|
1021 } |
|
1022 // Ensure the result register is not the input register because the |
|
1023 // result is initialized before the patching safepoint. |
|
1024 obj.load_item(); |
|
1025 LIR_Opr out_reg = rlock_result(x); |
|
1026 LIR_Opr tmp1 = new_register(objectType); |
|
1027 LIR_Opr tmp2 = new_register(objectType); |
|
1028 LIR_Opr tmp3 = LIR_OprFact::illegalOpr; |
|
1029 __ instanceof(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3, |
|
1030 x->direct_compare(), patching_info, |
|
1031 x->profiled_method(), x->profiled_bci()); |
|
1032 } |
|
1033 |
|
1034 |
|
1035 void LIRGenerator::do_If (If* x) { |
|
1036 assert(x->number_of_sux() == 2, "inconsistency"); |
|
1037 ValueTag tag = x->x()->type()->tag(); |
|
1038 bool is_safepoint = x->is_safepoint(); |
|
1039 |
|
1040 If::Condition cond = x->cond(); |
|
1041 |
|
1042 LIRItem xitem(x->x(), this); |
|
1043 LIRItem yitem(x->y(), this); |
|
1044 LIRItem* xin = &xitem; |
|
1045 LIRItem* yin = &yitem; |
|
1046 |
|
1047 if (tag == longTag) { |
|
1048 // For longs, only conditions "eql", "neq", "lss", "geq" are valid; |
|
1049 // mirror for other conditions. |
|
1050 if (cond == If::gtr || cond == If::leq) { |
|
1051 cond = Instruction::mirror(cond); |
|
1052 xin = &yitem; |
|
1053 yin = &xitem; |
|
1054 } |
|
1055 xin->set_destroys_register(); |
|
1056 } |
|
1057 xin->load_item(); |
|
1058 // TODO: don't load long constants != 0L |
|
1059 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) { |
|
1060 // inline long zero |
|
1061 yin->dont_load_item(); |
|
1062 } else if (tag == longTag || tag == floatTag || tag == doubleTag) { |
|
1063 // Longs cannot handle constants at right side. |
|
1064 yin->load_item(); |
|
1065 } else { |
|
1066 yin->dont_load_item(); |
|
1067 } |
|
1068 |
|
1069 // Add safepoint before generating condition code so it can be recomputed. |
|
1070 if (x->is_safepoint()) { |
|
1071 // Increment backedge counter if needed. |
|
1072 increment_backedge_counter(state_for (x, x->state_before()), x->profiled_bci()); |
|
1073 // Use safepoint_poll_register() instead of LIR_OprFact::illegalOpr. |
|
1074 __ safepoint(safepoint_poll_register(), state_for (x, x->state_before())); |
|
1075 } |
|
1076 set_no_result(x); |
|
1077 |
|
1078 LIR_Opr left = xin->result(); |
|
1079 LIR_Opr right = yin->result(); |
|
1080 __ cmp(lir_cond(cond), left, right); |
|
1081 // Generate branch profiling. Profiling code doesn't kill flags. |
|
1082 profile_branch(x, cond); |
|
1083 move_to_phi(x->state()); |
|
1084 if (x->x()->type()->is_float_kind()) { |
|
1085 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux()); |
|
1086 } else { |
|
1087 __ branch(lir_cond(cond), right->type(), x->tsux()); |
|
1088 } |
|
1089 assert(x->default_sux() == x->fsux(), "wrong destination above"); |
|
1090 __ jump(x->default_sux()); |
|
1091 } |
|
1092 |
|
1093 LIR_Opr LIRGenerator::getThreadPointer() { |
|
1094 return FrameMap::as_pointer_opr(Z_thread); |
|
1095 } |
|
1096 |
|
1097 void LIRGenerator::trace_block_entry(BlockBegin* block) { |
|
1098 __ move(LIR_OprFact::intConst(block->block_id()), FrameMap::Z_R2_opr); |
|
1099 LIR_OprList* args = new LIR_OprList(1); |
|
1100 args->append(FrameMap::Z_R2_opr); |
|
1101 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry); |
|
1102 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args); |
|
1103 } |
|
1104 |
|
1105 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address, |
|
1106 CodeEmitInfo* info) { |
|
1107 __ store(value, address, info); |
|
1108 } |
|
1109 |
|
1110 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result, |
|
1111 CodeEmitInfo* info) { |
|
1112 __ load(address, result, info); |
|
1113 } |
|
1114 |
|
1115 |
|
1116 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data, |
|
1117 BasicType type, bool is_volatile) { |
|
1118 LIR_Address* addr = new LIR_Address(src, offset, type); |
|
1119 bool is_obj = (type == T_ARRAY || type == T_OBJECT); |
|
1120 if (is_obj) { |
|
1121 // Do the pre-write barrier, if any. |
|
1122 pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */, |
|
1123 true /* do_load */, false /* patch */, NULL); |
|
1124 __ move(data, addr); |
|
1125 assert(src->is_register(), "must be register"); |
|
1126 // Seems to be a precise address. |
|
1127 post_barrier(LIR_OprFact::address(addr), data); |
|
1128 } else { |
|
1129 __ move(data, addr); |
|
1130 } |
|
1131 } |
|
1132 |
|
1133 |
|
1134 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset, |
|
1135 BasicType type, bool is_volatile) { |
|
1136 LIR_Address* addr = new LIR_Address(src, offset, type); |
|
1137 __ load(addr, dst); |
|
1138 } |
|
1139 |
|
1140 void LIRGenerator::do_UnsafeGetAndSetObject(UnsafeGetAndSetObject* x) { |
|
1141 BasicType type = x->basic_type(); |
|
1142 assert (x->is_add() && type != T_ARRAY && type != T_OBJECT, "not supported"); |
|
1143 LIRItem src(x->object(), this); |
|
1144 LIRItem off(x->offset(), this); |
|
1145 LIRItem value(x->value(), this); |
|
1146 |
|
1147 src.load_item(); |
|
1148 value.load_item(); |
|
1149 off.load_nonconstant(20); |
|
1150 |
|
1151 LIR_Opr dst = rlock_result(x, type); |
|
1152 LIR_Opr data = value.result(); |
|
1153 LIR_Opr offset = off.result(); |
|
1154 |
|
1155 LIR_Address* addr; |
|
1156 if (offset->is_constant()) { |
|
1157 assert(Immediate::is_simm20(offset->as_jlong()), "should have been loaded into register"); |
|
1158 addr = new LIR_Address(src.result(), offset->as_jlong(), type); |
|
1159 } else { |
|
1160 addr = new LIR_Address(src.result(), offset, type); |
|
1161 } |
|
1162 |
|
1163 __ xadd(LIR_OprFact::address(addr), data, dst, LIR_OprFact::illegalOpr); |
|
1164 } |
|
1165 |
|
1166 void LIRGenerator::do_update_CRC32(Intrinsic* x) { |
|
1167 assert(UseCRC32Intrinsics, "or should not be here"); |
|
1168 LIR_Opr result = rlock_result(x); |
|
1169 |
|
1170 switch (x->id()) { |
|
1171 case vmIntrinsics::_updateCRC32: { |
|
1172 LIRItem crc(x->argument_at(0), this); |
|
1173 LIRItem val(x->argument_at(1), this); |
|
1174 // Registers destroyed by update_crc32. |
|
1175 crc.set_destroys_register(); |
|
1176 val.set_destroys_register(); |
|
1177 crc.load_item(); |
|
1178 val.load_item(); |
|
1179 __ update_crc32(crc.result(), val.result(), result); |
|
1180 break; |
|
1181 } |
|
1182 case vmIntrinsics::_updateBytesCRC32: |
|
1183 case vmIntrinsics::_updateByteBufferCRC32: { |
|
1184 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32); |
|
1185 |
|
1186 LIRItem crc(x->argument_at(0), this); |
|
1187 LIRItem buf(x->argument_at(1), this); |
|
1188 LIRItem off(x->argument_at(2), this); |
|
1189 LIRItem len(x->argument_at(3), this); |
|
1190 buf.load_item(); |
|
1191 off.load_nonconstant(); |
|
1192 |
|
1193 LIR_Opr index = off.result(); |
|
1194 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0; |
|
1195 if (off.result()->is_constant()) { |
|
1196 index = LIR_OprFact::illegalOpr; |
|
1197 offset += off.result()->as_jint(); |
|
1198 } |
|
1199 LIR_Opr base_op = buf.result(); |
|
1200 |
|
1201 if (index->is_valid()) { |
|
1202 LIR_Opr tmp = new_register(T_LONG); |
|
1203 __ convert(Bytecodes::_i2l, index, tmp); |
|
1204 index = tmp; |
|
1205 } |
|
1206 |
|
1207 LIR_Address* a = new LIR_Address(base_op, index, offset, T_BYTE); |
|
1208 |
|
1209 BasicTypeList signature(3); |
|
1210 signature.append(T_INT); |
|
1211 signature.append(T_ADDRESS); |
|
1212 signature.append(T_INT); |
|
1213 CallingConvention* cc = frame_map()->c_calling_convention(&signature); |
|
1214 const LIR_Opr result_reg = result_register_for (x->type()); |
|
1215 |
|
1216 LIR_Opr arg1 = cc->at(0); |
|
1217 LIR_Opr arg2 = cc->at(1); |
|
1218 LIR_Opr arg3 = cc->at(2); |
|
1219 |
|
1220 // CCallingConventionRequiresIntsAsLongs |
|
1221 crc.load_item_force(arg1); // We skip int->long conversion here, because CRC32 stub doesn't care about high bits. |
|
1222 __ leal(LIR_OprFact::address(a), arg2); |
|
1223 load_int_as_long(gen()->lir(), len, arg3); |
|
1224 |
|
1225 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), LIR_OprFact::illegalOpr, result_reg, cc->args()); |
|
1226 __ move(result_reg, result); |
|
1227 break; |
|
1228 } |
|
1229 default: { |
|
1230 ShouldNotReachHere(); |
|
1231 } |
|
1232 } |
|
1233 } |
|
1234 |
|
1235 void LIRGenerator::do_update_CRC32C(Intrinsic* x) { |
|
1236 Unimplemented(); |
|
1237 } |
|
1238 |
|
1239 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) { |
|
1240 fatal("FMA intrinsic is not implemented on this platform"); |
|
1241 } |
|
1242 |
|
1243 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) { |
|
1244 fatal("vectorizedMismatch intrinsic is not implemented on this platform"); |
|
1245 } |
|
1246 |